NDLI: Materials basis for a six level epitaxial HTS digital circuit process

Content Provider	IEEE Xplore Digital Library
Author	Talvacchio, J. Forrester, M.G. Hunt, B.D. McCambridge, J.D. Young, R.M. Zhang, X.F. Miller, D.J.
Copyright Year	2002
Abstract	We have developed a process for fabrication of HTS single-flux-quantum logic circuits based on edge SNS junctions which requires six epitaxial film layers and six mask levels. The process was successfully applied to fabrication of small-scale circuits (/spl les/10 junctions). This paper examines the materials properties affecting the reproducibility of YBCO-based SNS junctions, the low inductance provided by an integrated YBCO ground plane, and electrical isolation by SrTiO/sub 3/, or Sr/sub 2/AlTaO/sub 6/, ground-plane and junction insulator layers. Some of the critical processing parameters identified by electrical measurements, TEM, SEM, and AFM were control of second-phase precipitates in YBCO, oxygen diffusion, Ar ion-milling parameters, and preparation of surfaces for subsequent high-temperature depositions.
Sponsorship	Council on Superconductivity Appl. Superconductivity Conference Inc MIT
Starting Page	2051
Ending Page	2056
Page Count	6
File Size	922056
File Format	PDF
ISSN	10518223
Volume Number	7
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-06-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	High temperature superconductors Digital circuits Fabrication Yttrium barium copper oxide Logic circuits Material properties Reproducibility of results Inductance Strontium Dielectrics and electrical insulation
Content Type	Text
Resource Type	Article
Subject	Condensed Matter Physics Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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