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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Quack, N. Sadie, J. Subramanian, V. Wu, M.C. |
| Copyright Year | 2013 |
| Description | Author affiliation: Berkeley Sensor & Actuator Center, Univ. of California, Berkeley, Berkeley, CA, USA (Quack, N.; Wu, M.C.) || Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, Berkeley, CA, USA (Sadie, J.; Subramanian, V.) |
| Abstract | We present a novel technique for heterogeneous integration using gold filled Through Silicon Vias (TSV) and thermocompression bond bumps formed in a single fabrication step, using gold nanoparticles dispensed by inkjet printing. Gold-filled TSV arrays (12 × 12, via radius 50μm, pitch 250μm) have been demonstrated using this method. Void free, filled TSVs are reported, and thermocompression bonding yielded seamless interfaces. Die shear tests show good bond strength, and sub-Ω via resistances were measured. The presented integration process exhibits a low temperature budget (≤250°C), allows good alignment, and is compatible with substrates of different sizes and materials, enabling the heterogeneous integration of known-good-dies (KGD) which may have been fabricated in different technologies. |
| Starting Page | 834 |
| Ending Page | 837 |
| File Size | 1330445 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781467359832 |
| ISSN | 21641641 |
| DOI | 10.1109/Transducers.2013.6626896 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-06-16 |
| Publisher Place | Spain |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Through-silicon vias Printing Gold Electrical resistance measurement Silicon Bonding Filling Known-Good-Die (KGD) Through Silicon Via (TSV) 3D Integration Nanoparticle Inkjet-Printing MEMS Flip-Chip Bonding Chip Scale Packaging (CSP) |
| Content Type | Text |
| Resource Type | Article |
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