NDLI: Reliability improvement study of a build-up wire bonding EBGA package using eight-layer 0.13 /spl mu/m copper silicon technology

Content Provider	IEEE Xplore Digital Library
Author	Liyu Yang King, C. Peng, R. Gelvin, E.
Copyright Year	2006
Description	Author affiliation: Intel Corp., Folsom, CA (Liyu Yang; King, C.)
Abstract	In this paper, the authors discuss the die cracking/thin film delamination failures seen in 8-layer 0.13 mum silicon during the development of an EBGA package with 45 mm times 45 mm body size. The die size was 15.2 mm per side with over 1400 wire bonded pads. The large package body size and die size provided both manufacturing and reliability challenges. It was pointed out that, due to the large die size and complex 8-layer metal silicon process used, the reliability performance heavily relies on the optimization of the wafer sawing process, and stress distributed on the silicon, thin film adhesion, test conditions and assembly variations. Failure analysis demonstrated that cracks initiated from the die edge and then propagated through the interface of M1/silicon interfaces, at certain point, the cracks turn to the surface shown as die cracking. The experimental result showed optimized dual step cut wafer sawing can significantly reduce the risks of die cracking/thin film delamination, the failure rate can be reduced from ~30% to ~5%. It was also observed that units from various lots are performing significantly different during the reliability testing. Finite element study also showed low stress encapsulation materials helps reduce the tensile stress applied on the die edge, and reduce the risk for die cracking. In the future, additional research will be carried out to understand if the metal density in the scribe is playing a significant role, how the cracks initiated and propagated at what steps
File Size	1448454
File Format	PDF
ISBN	1424401526
ISSN	05695503
DOI	10.1109/ECTC.2006.1645919
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-05-30
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Wire Bonding Packaging Copper Silicon Tensile stress Semiconductor thin films Delamination Sawing Testing
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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