NDLI: Nano nickel-tin interconnects and electrodes for next generation 15 micron pitch embedded bio fluidic sensors in FR4 substrates

Content Provider	IEEE Xplore Digital Library
Author	Doraiswami, R.
Copyright Year	2006
Description	Author affiliation: George W. Woodruuf Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA (Doraiswami, R.)
Abstract	Lead free solder bumping requirements have challenged researchers to develop technologies to achieve fine pitch interconnects. ITRS has predicts that by 2017 the industry require 70 micron pitch area array lead free interconnects for flip chips. This paper describes bumping, assembly and reliability evaluation of a nano composite 15 micron pitch interconnect technology. Nanoparticles are the most common building blocks in several applications of nanotechnology. Beside, the enormous increase of their surface area, the high surface to volume ratio of the nano particles results in extraordinary high reactivity, and unusual physical properties (optical, magnetic, etc.). Several types of nanostructures (nano particles, nano-wires and nano-rods) can be fabricated. Dispersed nano particles are used in several important applications, e.g., catalysis, biomedical applications, nano coatings and nanocomposites. Nanostructured materials, prepared by consolidating nanoparticles with a very high density of grain boundary, have been shown to lead to dramatically improved mechanical and physical properties. Lead free interconnect reliability has been a concern due tin pest (whiskers), intermetallics and high temperature reflow problems. This problem becomes even more pronounced when the pitch of the flip chip reduces to 100 microns or lesser. This paper proposes a nano metal composite for fine pitch lead free interconnect as an alternative to solder for fine pitch flip chip interconnect as presented in R. R. Tummala (2001) and W. D. Brown (1999). This paper describes design, process, fabrication and reliability test for composite interconnects fabricated using Ni nano particles distributed in a tin core. A wafer level process is developed for flip chip having 15 micron pitch composite nano structured interconnect. The composition and intermetallics formed at the chip-to- interconnect-interface are evaluated when sent through 4 reflow cycles. Composition of the intermetallics is evaluated to study the distribution Ni3Sn4, Cu6Sn5 and Cu3Sn. Shear test on interconnects provide bump adhesion strength and fatigue resistance information. The failure mode associated with shear test is also presented. The chip is thermally cycled in a oven from -55degC to 125degC and after every 100 cycles is evaluated for defects using x-ray and Sonoscan techniques. A cross section is made and the composition at interface is also evaluated for intermetalic diffusion. The paper provides optimized data for next generation nano composite interconnect for fine pitch flip chip to achieve high reliability. The paper also describes a process to fabricate substrates with nano lines and embedded fluidic channels
File Size	494217
File Format	PDF
ISBN	1424401526
ISSN	05695503
DOI	10.1109/ECTC.2006.1645826
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-05-30
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electrodes Biosensors Lead Flip chip Environmentally friendly manufacturing techniques Intermetallic Testing Nanoparticles Tin Assembly
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Microstructure of Sn-Ag-Cu lead-free flip chip interconnects during aging

Nano-Composite Lead-Free Interconnect and Reliability

Fine Pitch Au-SnAgCu Joint-in-via Flip-Chip Packaging

Fine pitch stencil printing of Sn/Pb and lead free solders for flip chip technology

Solder alloy selection for flip chip on board

Metallurgy and stability of the Sn/Cu interface for lead-free flip chip application

Development fine pitch area array Cu pillar/lead free solder bumps for large 28nm die in large organic flip chip packages

Fine pitch stencil printing of Sn/Pb and lead free solders for flip chip technology

Cu pillar bumps as a lead-free drop-in replacement for solder-bumped, flip-chip interconnects

Nano nickel-tin interconnects and electrodes for next generation 15 micron pitch embedded bio fluidic sensors in FR4 substrates

Similar Documents

Microstructure of Sn-Ag-Cu lead-free flip chip interconnects during aging

Nano-Composite Lead-Free Interconnect and Reliability

Fine Pitch Au-SnAgCu Joint-in-via Flip-Chip Packaging

Fine pitch stencil printing of Sn/Pb and lead free solders for flip chip technology

Solder alloy selection for flip chip on board

Metallurgy and stability of the Sn/Cu interface for lead-free flip chip application

Development fine pitch area array Cu pillar/lead free solder bumps for large 28nm die in large organic flip chip packages

Fine pitch stencil printing of Sn/Pb and lead free solders for flip chip technology

Cu pillar bumps as a lead-free drop-in replacement for solder-bumped, flip-chip interconnects

Nano nickel-tin interconnects and electrodes for next generation 15 micron pitch embedded bio fluidic sensors in FR4 substrates