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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Oz, I. Topcuoglu, H.R. Kandemir, M. Tosun, O. |
| Copyright Year | 2012 |
| Description | Author affiliation: Computer Engineering Department, Bogazici University, 34342, Istanbul, Turkey (Oz, I.; Tosun, O.) || Dept. of Computer Science and Engineering, Pennsylvania State University, University Park, 16802, USA (Kandemir, M.) || Computer Engineering Department, Marmara University, 34722, Istanbul, Turkey (Topcuoglu, H.R.) |
| Abstract | Modern architectures become more susceptible to transient errors with the scale down of circuits. This makes reliability an increasingly critical concern in computer systems. In general, there is a tradeoff between system reliability and performance of multithreaded applications running on multicore architectures. In this paper, we conduct a performance-reliability analysis for different parallel versions of three data-intensive applications including FFT, Jacobi Kernel, andWater Simulation. We measure the performance of these programs by counting execution clock cycles, while the system reliability is measured by Thread Vulnerability Factor (TVF) which is a recently-proposed metric. TVF measures the vulnerability of a thread to hardware faults at a high level. We carry out experiments by executing parallel implementations on multicore architectures and collect data about the performance and vulnerability. Our experimental evaluation indicates that the choice is clear for FFT application and Jacobi Kernel. Transpose algorithm for FFT application results in less than 5% performance loss while the vulnerability increases by 20% compared to binary-exchange algorithm. Unrolled Jacobi code reduces execution time up to 50% with no significant change on vulnerability values. However, the tradeoff is more interesting for Water Simulation where nsquared version reduces the vulnerability values significantly by worsening the performance with similar rates compared to faster but more vulnerable spatial version. |
| Starting Page | 893 |
| Ending Page | 898 |
| File Size | 131844 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781457721458 |
| ISSN | 15301591 |
| DOI | 10.1109/DATE.2012.6176624 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-03-12 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | European Design Automation Association (EDAA) |
| Subject Keyword | Instruction sets Reliability Jacobian matrices Measurement Registers Hardware Multicore processing Distributed Algorithms Multi-Core Architectures and Support Reliable Parallel |
| Content Type | Text |
| Resource Type | Article |
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