NDLI: Hierarchical analog circuit reliability analysis using multivariate nonlinear regression and active learning sample selection

Content Provider	IEEE Xplore Digital Library
Author	Maricau, E. De Jonghe, D. Gielen, G.
Copyright Year	2012
Description	Author affiliation: K.U. Leuven, ESAT-MICAS, B-3001 Heverlee, Belgium (Maricau, E.; De Jonghe, D.; Gielen, G.)
Abstract	The paper discusses a technique to perform efficient circuit reliability analysis of large analog and mixed-signal systems. The proposed method includes the impact of both process variations and transistor aging effects. The complexity of large systems is dealt with by partitioning the system into manageable subblocks that are modeled separately. These models are then evaluated to obtain the system specifications. However, highly expensive reliability simulations, combined with nonlinear output behavior and the high dimensionality of the problem is still a very challenging task. Therefore the use of fast function extraction symbolic regression (FFX) is proposed. This allows to capture the high-dimensional nonlinear problem with good accuracy. Also, an active learning sample selection algorithm is introduced to minimize the amount of expensive aging simulations. The algorithm trades of space exploration with function nonlinearity detection and model uncertainty reduction to select optimal model training samples. The simulation method is demonstrated on a 6 bit Flash ADC, designed in a 32nm CMOS technology. Experimental results show a speedup of 360× over existing aging simulators to evaluate 100 Monte-Carlo samples with good accuracy.
Starting Page	745
Ending Page	750
File Size	1005733
Page Count	6
File Format	PDF
ISBN	9781457721458
ISSN	15301591
DOI	10.1109/DATE.2012.6176568
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-03-12
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	European Design Automation Association (EDAA)
Subject Keyword	Aging Integrated circuit modeling Computational modeling Integrated circuit reliability Transistors Stochastic processes
Content Type	Text
Resource Type	Article

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