NDLI: Theoretical investigation of sub-ambient on-chip microprocessor cooling

Content Provider	IEEE Xplore Digital Library
Author	Jain, A. Ramanathan, S.
Copyright Year	2006
Description	Author affiliation: Intel Corp. (Jain, A.)
Abstract	Thermal management of microprocessors is a continuing challenge for electronics package design. Traditional thermal management strategies have focused merely on maintaining the junction temperature just below the maximum permissible limit. This work investigates the feasibility of sub-ambient microprocessor operation using an appropriate cooling technology. A simple model for the temperature dependence of various sources of power dissipation and performance parameters of a microprocessor shows significant power and performance improvement due to sub-ambient operation. It is further shown that the total system power consumption, including the power required for microprocessor cooling may decrease for operation in a specific temperature window. Below a threshold temperature, the total power consumption exceeds current values due to the rapid rise in cooling power. Operation at temperatures lower than the critical value may still be attractive for applications where performance improvement is critical. Stirling cycle-based pulse tube cooling technology offers a low cost, high power efficiency solution to facilitate low temperature microprocessor operation. First-order thermodynamic calculations presented in this work show that it may be possible to use pulse tube coolers to remove heat loads expected in typical microprocessor operation
Starting Page	765
Ending Page	770
File Size	307151
Page Count	6
File Format	PDF
ISBN	0780395247
ISSN	10879870
DOI	10.1109/ITHERM.2006.1645423
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-05-30
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Microprocessors Electronic packaging thermal management Thermal management Electronics cooling Thermal management of electronics Energy consumption Appropriate technology Power system modeling Temperature dependence Power dissipation
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Using cap-integral standoffs to reduce chip hot-spot temperatures in electronic packages

Transient thermal management in electronic packaging using dynamic control of power dissipation and heat transfer

Thermal management of high power dissipation electronic packages: from air cooling to liquid cooling

Analytical Modeling For Prediction of Hot Spot Chip Junction Temperature for Electronics Cooling Applications

Technological and architectural power optimizations for advance microprocessors

Experimental method of measuring C4 die bump temperature for electronics packaging

Impact of chip power dissipation on thermodynamic performance

Harvesting Wasted Heat in a Microprocessor Using Thermoelectric Generators: Modeling, Analysis and Measurement

Accurate Temperature-Dependent Integrated Circuit Leakage Power Estimation is Easy

Theoretical investigation of sub-ambient on-chip microprocessor cooling

Similar Documents

Using cap-integral standoffs to reduce chip hot-spot temperatures in electronic packages

Transient thermal management in electronic packaging using dynamic control of power dissipation and heat transfer

Thermal management of high power dissipation electronic packages: from air cooling to liquid cooling

Analytical Modeling For Prediction of Hot Spot Chip Junction Temperature for Electronics Cooling Applications

Technological and architectural power optimizations for advance microprocessors

Experimental method of measuring C4 die bump temperature for electronics packaging

Impact of chip power dissipation on thermodynamic performance

Harvesting Wasted Heat in a Microprocessor Using Thermoelectric Generators: Modeling, Analysis and Measurement

Accurate Temperature-Dependent Integrated Circuit Leakage Power Estimation is Easy

Theoretical investigation of sub-ambient on-chip microprocessor cooling