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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Soares, C. Petraglia, A. |
| Copyright Year | 2009 |
| Description | Author affiliation: Federal University of Rio de Janeiro - EPOLI/PEE/COPPE, Brazil (Soares, C.; Petraglia, A.) |
| Abstract | Capacitance matching is a critical issue in several analog and mixed-signal designs such as switched-capacitor filters, A/D and D/A converters. Using identical unit capacitors in parallel to implement each capacitor in the design, combined with a careful layout, is the best technique to achieve a good capacitance matching. Common-centroid geometry is the most widely used layout technique for matching capacitors, because this placement improves the immunity against process gradients. However, the common-centroid geometry is not the only possible placement that has this feature. In this paper, other possible placements, which are also immune to process gradients, are presented. These alternative geometries are specially suitable for layouts where the number of unit capacitors do not allow a perfect common-centroid placement. Since finding these alternative layouts is a very difficult task, this paper proposes an automated method to find the optimal placement for an array of unit capacitors. |
| Starting Page | 1739 |
| Ending Page | 1742 |
| File Size | 680155 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424438273 |
| DOI | 10.1109/ISCAS.2009.5118111 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-05-24 |
| Publisher Place | Taiwan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Capacitors Capacitance Geometry Matched filters Switching converters Analog integrated circuits Approximation methods Analog circuits Routing Shape |
| Content Type | Text |
| Resource Type | Article |
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