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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Becker, F. Kuhl, M. Manoli, Y. Paul, O. |
| Copyright Year | 2015 |
| Description | Author affiliation: Dept. of Microsyst. Eng., Univ. of Freiburg, Freiburg, Germany (Becker, F.; Kuhl, M.; Manoli, Y.; Paul, O.) |
| Abstract | This paper presents a novel method to operate Wheatstone bridges of piezoresistive field effect transistors (FETs) as stress sensors. Such structures consist of a square arrangement of four FETs connected by the source/drain diffusion in each corner. When the FETs are on and the bridge is operated with an input voltage between a pair of opposite contacts, the bridge output voltage appearing between the perpendicular contact pair is proportional to the difference of in-plane normal stress components. In the new method the resistivity of one of the four FETs is individually tuned by varying its gate voltage by ΔV from the common gate voltage of the other three gates, in order to rebalance the bridge. We find that the corresponding sensitivity normalized to the input voltage reaches 4.5 mV/(V MPa). It is thus a factor of about 10 higher than the conventional sensitivity based on the bridge output voltage, which reaches 490 μV (V MPa). |
| Sponsorship | IEEE |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 1748589 |
| Page Count | 4 |
| File Format | |
| e-ISBN | 9781479982035 |
| DOI | 10.1109/ICSENS.2015.7370482 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-11-01 |
| Publisher Place | South Korea |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Stress Logic gates Voltage measurement Field effect transistors Bridge circuits Sensitivity CMOS integrated circuits piezo-FET CMOS mechanical stress sensor |
| Content Type | Text |
| Resource Type | Article |
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