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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Fong-Yuan Chang Ren-Song Tsay Wai-Kei Mak |
| Copyright Year | 2009 |
| Description | Author affiliation: Department of Computer Science National Tsing-Hua, University, Hsinchu, Taiwan (Fong-Yuan Chang; Ren-Song Tsay; Wai-Kei Mak) |
| Abstract | This paper accurately considers wire short defects and proposes an algorithm to guarantee IC chip yield rate improvement for redundant wire insertion. Without considering yield rate degradation caused by shorts, traditional methods may even lead to yield rate loss. However, shorts are more complicated to analyze than opens. Moreover, since any two points of a routed net can be connected by a redundant wire, the number of possible insertion patterns for a chip is un-tractable. To maximize yield rate improvement and to make the problem tractable, we identify a key insight, tolerance-ratio, as an effective guide for choosing insertion patterns and insertion order. Finally, to guarantee yield rate improvement, only positive gain redundant wires are committed. Experimental results show that, compared with unprocessed cases, all yield rate improvements in the proposed algorithm are positive, and the defect rates are reduced by up to 65% and by 24% on average. On the other hand, without considering shorts, the defect rate can increase as much as 7%. |
| Starting Page | 33 |
| Ending Page | 38 |
| File Size | 571193 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781605588001 |
| ISSN | 10923152 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-11-02 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Association for Computing Machinery, Inc. (ACM) |
| Subject Keyword | Wire Circuit faults Wiring Electromigration Routing Integrated circuit yield Semiconductor device manufacture Permission Degradation Shape |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Computer Science Applications Software |
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