NDLI: Task management in MPSoCs: An ASIP approach

Content Provider	IEEE Xplore Digital Library
Author	Castrillon, J. Diandian Zhang Kempf, T. Vanthournout, B. Leupers, R. Ascheid, G.
Copyright Year	2009
Description	Author affiliation: Inst. for Integrated Signal Process. Syst. (ISS), RWTH Aachen Univ., Aachen, Germany (Castrillon, J.; Diandian Zhang; Kempf, T.; Leupers, R.; Ascheid, G.) \|\| CoWare, Inc., Leuven, Belgium (Vanthournout, B.)
Abstract	Scheduling, mapping and synchronization have an essential impact on the performance of Multi-Processor System-on-Chips (MPSoCs), especially in heterogeneous systems with many cores and small tasks. This paper presents a technique to efficiently accelerate these operations. Key contribution is an Application-Specific Instruction-set Processor (ASIP) called OSIP which is especially tailored to achieve this. In contrast to pure HW solutions, OSIP is programmable and hence features higher flexibility and better scalability. OSIP comes with a compiler and a firmware that ease its usability, and an abstract formal model that allows analytical evaluation and integration into fast system level simulators. Together with OSIP, a thin software layer is proposed that leverages high level multi-task programming by abstracting OSIP's low level details away. In an extensive case study based on a synthetic benchmark and a benchmark from the multimedia domain (H.264), OSIP highlights its potential when compared against a standard RISC and an ARM926-EJS processor.
Starting Page	587
Ending Page	594
File Size	714341
Page Count	8
File Format	PDF
ISBN	9781605588001
ISSN	10923152
DOI	10.1145/1687399.1687508
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-11-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Application specific processors Reduced instruction set computing Processor scheduling Power system management Master-slave Scalability Analytical models Design automation Signal processing Parallel processing MPSoC Scheduling and Mapping ASIP Embedded Systems
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Software

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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