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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Aschenbrenner, R. |
| Copyright Year | 2008 |
| Description | Author affiliation: Fraunhofer Inst. for Reliability & Microintegration, Berlin (Aschenbrenner, R.) |
| Abstract | Future generations of electronic products require further developments of integration and packaging technologies. The reasons for this are higher signal frequencies and the increasing functional density at acceptable costs. With the existing technologies organic substrates with high-density built-up layers with microvias can be produced. On both sides of the substrates, passive and active components can be assembled. The surface demand at the side of a printed circuit board for active components can be reduced to a minimum by the application of CSPs (chip size packages) or flip chips. However a further miniaturization requires a three-dimensional integration of the components. Advanced packages contain stacked chips, which are connected by bond wires with an interposer or a lead frame. Apart from the miniaturization the new applications require signal frequencies of several GHz, which can only be recalled with difficult due to the long bond wires and the extensive connection paths on the printed circuit board. Signal integrity requires connections that are much shorter and impedance-matched. This can be reached by embedded components. Embedding signifies that the conductor is not only located under the embedded components, but also on top of them. This enables to continue three-dimensional packaging on top of the embedded component as well. The component is electrically connected with the upper or lower conducting layer or with both of them, e. g. as it is the case in power ICs with contacts on both sides. The Fraunhofer IZM and the Technical University Berlin jointly develop advanced technologies for embedding of active chips for system-in-package (SiP) applications. The first development was the so-called chip-in-polymer technology, which enables the realization of SiPs as well as printed circuit boards with integrated components. It is based on the embedding of thin chips into built-up layers under the consequent use of printed circuit board technologies (PCB technologies). Electrical contacts to the chips are realized by laser-drilled and metallized microvias. |
| Starting Page | 1 |
| Ending Page | 2 |
| File Size | 255776 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781424427390 |
| DOI | 10.1109/ICEPT.2008.4606949 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-07-28 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Copper Printed circuits Polymers Substrates Reliability Humidity Packaging |
| Content Type | Text |
| Resource Type | Article |
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