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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Lee Yung Hsiang Loh Wei Keat Ee Boon Yee Leong Jenn Seong Lew Huey Ling |
| Copyright Year | 2006 |
| Description | Author affiliation: Intel Products, Penang (Lee Yung Hsiang; Loh Wei Keat; Ee Boon Yee; Leong Jenn Seong; Lew Huey Ling) |
| Abstract | This paper presents the effect of package assembly processes and substrate features on flip chip ball grid array (FCBGA) package solder joint shock performance. The study covered only on lead-free solder system. The package assembly processes include the ball attach reflow temperature, oven environment setting, simulated burn-in, number of board reflow and substrate features such as solder resist profile and solder pad Ni thickness. These assembly parameters play significant role in determining the quality of the solder joint as a function of entrapped flux residue. Both Cold Ball Pull (CBP) and component level shock test methodologies were adopted to study the assembly interaction with SJR performance of FCBGA package. With the above studies, result shows that a better quality solder joint can be attained through eliminating flux residue. This has been demonstrated through CBP monitoring where the observed brittle fail mode reduces significantly while component level testing shows improvement in shock performance. |
| Starting Page | 1 |
| Ending Page | 8 |
| File Size | 3308484 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781424408337 |
| DOI | 10.1109/EMAP.2006.4430614 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2006-12-11 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Assembly Soldering Electric shock Testing Flip chip Electronics packaging Environmentally friendly manufacturing techniques Lead Temperature Ovens |
| Content Type | Text |
| Resource Type | Article |
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