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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jeeradit, M. Jaeha Kim Horowitz, M. |
| Copyright Year | 2010 |
| Description | Author affiliation: Computer Systems Laboratory, Stanford University, CA, USA (Jeeradit, M.; Jaeha Kim; Horowitz, M.) |
| Abstract | This paper proposes a circuit optimization approach that can ease the computational burden on the simulation-based circuit optimizers by leveraging simple design equations that reflect the designer's intent. The technique is inspired by continuation methods (a.k.a. homotopy) in numerical analysis where a hard problem is solved by constructing an easier problem first and gradually refining its solution to that of the hard problem. In a circuit optimization context, the designer's simplified equations for the circuit serve as the easier problem. These simplified design equations are easy to write as they need not be completely accurate and have intuitive, well-understood solutions. Nonetheless, in several circuit examples, it was found that the designer's equations serve as better guidance than the conventional, fixed-point equations. As a result, the proposed approach demonstrates the better convergence to the desired solution with less computational efforts. |
| Starting Page | 1614 |
| Ending Page | 1619 |
| File Size | 651937 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424470549 |
| ISSN | 15301591 |
| e-ISBN | 9783981080162 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-03-08 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | European Design Automation Association (EDAA) |
| Subject Keyword | Analog circuits Equations Circuit simulation Circuit optimization Design optimization Differential amplifiers Analog computers Computational modeling Simulated annealing Voltage Automated Design Transistor Sizing Circuit Optimization |
| Content Type | Text |
| Resource Type | Article |
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