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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Soeken, M. Wille, R. Kuhlmann, M. Gogolla, M. Drechsler, R. |
| Copyright Year | 2010 |
| Description | Author affiliation: Group for Computer Architecture, University of Bremen, 28359, Germany (Soeken, M.; Wille, R.; Drechsler, R.) || Database Systems Group, University of Bremen, 28359, Germany (Kuhlmann, M.; Gogolla, M.) |
| Abstract | Nowadays, modeling languages like UML are essential in the design of complex software systems and also start to enter the domain of hardware and hardware/software codesign. Due to shortening time-to-market demands, “first time right” requirements have thereby to be satisfied. In this paper, we propose an approach that makes use of Boolean satisfiability for verifying UML/OCL models. We describe how the respective components of a verification problem, namely system states of a UML model, OCL constraints, and the actual verification task, can be encoded and afterwards automatically solved using an off-the-shelf SAT solver. Experiments show that our approach can solve verification tasks significantly faster than previous methods while still supporting a large variety of UML/OCL constructs. |
| Starting Page | 1341 |
| Ending Page | 1344 |
| File Size | 114199 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424470549 |
| ISSN | 15301591 |
| e-ISBN | 9783981080162 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-03-08 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | European Design Automation Association (EDAA) |
| Subject Keyword | Unified modeling language Hardware Software design Software systems Time to market Concrete Logic Computer architecture Database systems Application software |
| Content Type | Text |
| Resource Type | Article |
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