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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Shafik, R.A. Al-Hashimi, B.M. Chakrabarty, K. |
| Copyright Year | 2010 |
| Description | Author affiliation: Department of ECE, Duke University, Durham, NC 27708, USA (Chakrabarty, K.) || School of ECS, University of Southampton, SO17 1BJ, UK (Shafik, R.A.; Al-Hashimi, B.M.) |
| Abstract | In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft error-aware design optimization using joint power minimization with voltage scaling and reliability improvement through application task mapping. The aim is to minimize the number of SEUs experienced by the MPSoC for a suitably identified voltage scaling of the system processing cores such that the power is reduced and the specified real-time constraint is met.We evaluate the effectiveness of the proposed optimization technique using an MPEG-2 decoder and random task graphs. We show that for an MPEG-2 decoder with four processing cores, our optimization technique produces a design that experiences 38% less SEUs than soft error-unaware design optimization for a soft error rate of $10^{−9},$ while consuming 9% less power and meeting a given real-time constraint. Furthermore, we investigate the impact of architecture allocation (varying the number of MPSoC cores) on the power consumption and SEUs experienced. We show that for an MPSoC with six processing cores and a given real-time constraint, the proposed technique experiences upto 7% less SEUs compared to soft error-unaware optimization, while consuming only 3% more power. |
| Starting Page | 1462 |
| Ending Page | 1467 |
| File Size | 203813 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424470549 |
| ISSN | 15301591 |
| e-ISBN | 9783981080162 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-03-08 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | European Design Automation Association (EDAA) |
| Subject Keyword | Design optimization Embedded system Single event transient Constraint optimization Decoding Power system reliability Voltage Real time systems Error analysis Energy consumption |
| Content Type | Text |
| Resource Type | Article |
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