NDLI: Study of laser thermal processing (LTP) to meet sub 130 nm node shallow junction requirements

Content Provider	IEEE Xplore Digital Library
Author	Talwar, S. Felch, S. Downey, D. Yun Wang
Copyright Year	2000
Description	Author affiliation: Verdant Technol., San Jose, CA, USA (Talwar, S.)
Abstract	The 1999 ITRS roadmap places severe requirements on the source drain extensions. It wrongly suggests that no solutions exist for concurrently meeting the junction depth, sheet resistance and lateral abruptness requirements starting from the 130 nm node. Laser thermal processing (LTP) is a possible solution that is being investigated to meet the stringent roadmap requirements. At IIT '98, results of implant activation using laser thermal processing (LTP) were presented. Junctions with extremely low sheet resistance (73 Ohms/sq) for sub 30 nm depths were demonstrated. In this work, a study of the extendibility of the LTP approach to meet sub 130 nm node requirements has been undertaken. Sheet resistance, junction depth and vertical abruptness (which is used to infer lateral abruptness) of LTP junctions are measured for a range of junctions. It is shown that the sheet resistance and junction depth requirements can easily be met down to the 50 nm node using LTP. Further, it is observed that the vertical abruptness of the LTP junctions is SIMS limited and is better than 2 nm/decade. This meets the 100 nm node requirements.
Starting Page	175
Ending Page	177
File Size	359812
Page Count	3
File Format	PDF
ISBN	0780364627
DOI	10.1109/IIT.2000.924118
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-09-17
Publisher Place	Austria
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Implants Atomic beams Annealing Silicon Rapid thermal processing Optical pulses Surface resistance Atom lasers Amorphous materials Semiconductor lasers
Content Type	Text
Resource Type	Article

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