NDLI: A reconfigurable medically cohesive biomedical front-end with ΣΔ ADC in 0.18µm CMOS

Content Provider	IEEE Xplore Digital Library
Author	Jha, P. Patra, P. Naik, J. Acharya, A. Rajalakshmi, P. Singh, S.G. Dutta, A.
Copyright Year	2015
Description	Author affiliation: Dept. of Electr. Eng., Indian Inst. of Technol. Hyderabad, Hyderabad, India (Jha, P.; Patra, P.; Naik, J.; Acharya, A.; Rajalakshmi, P.; Singh, S.G.; Dutta, A.)
Abstract	This paper presents a generic programmable analog front-end (AFE) for acquisition and digitization of various biopotential signals. This includes a lead-off detection circuit, an ultra-low current capacitively coupled signal conditioning stage with programmable gain and bandwidth, a new mixed signal automatic gain control (AGC) mechanism and a medically cohesive reconfigurable ΣΔ ADC. The full system is designed in UMC 0.18μm CMOS. The AFE achieves an overall linearity of more 10 bits with 0.47μW power consumption. The ADC provides $2^{nd}$ order noise-shaping while using single integrator and an ENOB of ~11 bits with 5μW power consumption. The system was successfully verified for various ECG signals from PTB database. This system is intended for portable batteryless u-Healthcare devices.
Starting Page	833
Ending Page	836
File Size	1252202
Page Count	4
File Format	PDF
ISSN	1557170X
e-ISBN	9781424492718
DOI	10.1109/EMBC.2015.7318491
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-08-25
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electrocardiography Signal resolution Gain control Power demand Noise shaping Detectors Bandwidth
Content Type	Text
Resource Type	Article
Subject	Signal Processing Biomedical Engineering Health Informatics Computer Vision and Pattern Recognition

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A 2μW biomedical frontend with ΣΔ ADC for self-powered U-healthcare devices in 0.18μm CMOS technology

The design of CMOS general-purpose analog front-end circuit with tunable gain and bandwidth for biopotential signal recording systems

A low-power asynchronous ECG acquisition system in CMOS technology

A low-power current-reuse dual-band analog front-end for multi-channel neural signal recording

Direct Analog-to-QRS detection front-end architecture for wearable ECG applications

A 700mV low power low noise implantable neural recording system design

Transmission of wireless neural signals through a 0.18µm CMOS low-power amplifier

Design of a wideband CMOS impedance spectroscopy ASIC analog front-end for multichannel biosensor interfaces

A 1.04µW wireless integrated MEMS interface in UMC 0.18µm CMOS

A reconfigurable medically cohesive biomedical front-end with ΣΔ ADC in 0.18µm CMOS

Similar Documents

A 2μW biomedical frontend with ΣΔ ADC for self-powered U-healthcare devices in 0.18μm CMOS technology

The design of CMOS general-purpose analog front-end circuit with tunable gain and bandwidth for biopotential signal recording systems

A low-power asynchronous ECG acquisition system in CMOS technology

A low-power current-reuse dual-band analog front-end for multi-channel neural signal recording

Direct Analog-to-QRS detection front-end architecture for wearable ECG applications

A 700mV low power low noise implantable neural recording system design

Transmission of wireless neural signals through a 0.18µm CMOS low-power amplifier

Design of a wideband CMOS impedance spectroscopy ASIC analog front-end for multichannel biosensor interfaces

A 1.04µW wireless integrated MEMS interface in UMC 0.18µm CMOS

A reconfigurable medically cohesive biomedical front-end with ΣΔ ADC in 0.18µm CMOS