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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Tianrui Zhu Yun Liang Yimao Cai Lidong Lan Xin Li |
| Copyright Year | 2014 |
| Description | Author affiliation: Beijing Microelectron. Technol. Inst., Beijing, China (Tianrui Zhu; Yun Liang; Yimao Cai; Lidong Lan; Xin Li) |
| Abstract | Developing from IC and PCB, the SIP (system in a package) has already been one of the most important development directions of future electronic system; therefore, we desiderate the study of testing design and test method. Being incapable of adding circuits for testable design, the SIP can only design test method and process according to the existing resources. Test method in this paper takes into account both the IC characteristic and the PCB characteristic of SIP, using the test results of bare dies and substrates in SIP, combined with the SIP production process, identify the steps may cause failure, determine the test projects, and finally complete the test method design. At the same time, consideration has already be given to both test coverage and the cost, it fulfill the actual requirement of SIP. |
| Starting Page | 117 |
| Ending Page | 120 |
| File Size | 274352 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781479947072 |
| DOI | 10.1109/ICEPT.2014.6922617 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-08-12 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Testing Field programmable gate arrays Production Pins Substrates Random access memory functional testing SIP testing method ATE |
| Content Type | Text |
| Resource Type | Article |
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