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Content Provider | IEEE Xplore Digital Library |
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Author | Yamaji, Y. Juso, H. Ohara, Y. Matsune, Y. Miyata, K. Sota, Y. Narai, A. Kimura, T. Fujita, K. Kada, M. |
Copyright Year | 1997 |
Description | Author affiliation: VLSI Dev. Lab., Sharp Corp., Nara, Japan (Yamaji, Y.) |
Abstract | High density packages are demanded due to recent miniaturization for personal tools. In order to satisfy these demands, development is being done in various companies in CSP (Chip-Size-Package or Chip-Scale-Package) in which its package size in nearly the same as LSI chip and function is close to bare chip. We have developed and mass production of CSP using current equipment based on a proven packaging technology involving wire bonding and transfer mold technology. We can realize 0.8 mm terminal pitch and from the memory with a few to ASIC with 300 in pin counts using this technology and correspond to various matrix layout independent of LSI chip size. The CSP developed by us uses polyimide with one side pattern. After mounting the LSI chip and connecting with wire bonding, one side is contained with mold resin. External terminals use solder ball which is of area array structure. In order to minimize the outline size of the package to be as close to the LSI chip as possible, various technologies were developed such as ultra-short loop wire bonding technology of a half length compared to conventional loop length, super-small solder ball mounting technology how far size of 0.3 mm /spl phi/, low stress high precision cutting technology with laser and fine pattern technology of substrate. Furthermore, in order to maintain high reliability to the level attained in conventional plastic packages, development was done on thermally resistant insulator and on mold resin which increase the adherence with substrate. Work was also done to reduce the effect of moisture in package through vent hole in pattern substrate. Regarding mounting to the PCB, the CSP developed by us is able to be mounted by merely recognizing of package's high precision outline with laser cutting technology and mounting with other packages is possible due to collective reflow which utilize conventional technologies. Reliability evaluation after mounting has shown that it is very realistic levels for us. By developing the above technologies and developing new materials, packaging technology for a highly reliable CSP was made possible. |
Starting Page | 1022 |
Ending Page | 1028 |
File Size | 838027 |
Page Count | 7 |
File Format | |
ISBN | 078033857X |
ISSN | 05695503 |
DOI | 10.1109/ECTC.1997.606296 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 1997-05-18 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Chip scale packaging Large scale integration Wire Bonding Packaging machines Resins Laser beam cutting Mass production Application specific integrated circuits Transmission line matrix methods |
Content Type | Text |
Resource Type | Article |
Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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