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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | D'Silva, V. Kroening, D. |
| Copyright Year | 2009 |
| Description | Author affiliation: Computing Laboratory, Oxford University, U.K. (D'Silva, V.; Kroening, D.) |
| Abstract | Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay identify multi-cycle paths (MCPs), which allow timing to be relaxed, but ignore the set of reachable states, achieving scalability at the cost of a severe lack of precision. Even simple circuits contain paths affecting timing that can only be detected if the set of reachable states is considered. We examine the theoretical foundations of MCP identification and characterise the MCPs in a circuit by a fixed point equation. The optimal solution to this equation can be computed iteratively and yields the largest set of MCPs in a circuit. Further, we define conservative approximations of this set, show how different MCP identification methods in the literature compare in terms of precision, and show one method to be unsound. The practical application of these results is a new method to detect multi-cycle paths using techniques for computing invariants in a circuit. Our implementation performs well on several benchmarks, including an exponential improvement on circuits analysed in the literature. |
| Starting Page | 1710 |
| Ending Page | 1715 |
| File Size | 206812 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424437818 |
| ISSN | 15301591 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-04-20 |
| Publisher Place | France |
| Access Restriction | Subscribed |
| Rights Holder | European Design Automation Association (EDAA) |
| Subject Keyword | Circuits Timing Equations Clocks Frequency Delay estimation State estimation Propagation delay Scalability Costs |
| Content Type | Text |
| Resource Type | Article |
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