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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Bombieri, N. Fummi, F. Pravadelli, G. Vinco, S. |
| Copyright Year | 2009 |
| Description | Author affiliation: Dipartimento di Informatica, Università di Verona, Italy (Bombieri, N.; Fummi, F.; Pravadelli, G.; Vinco, S.) |
| Abstract | The generation of device drivers is a very time consuming and error prone activity. All the strategies proposed up to now to simplify this operation require a manual, even formal, specification of the device driver functionalities. In the system-level design, IP functionalities are tested by using testbenches, implemented to contain the communication protocols to correctly interact with the device. The aim of this paper is to present a methodology to automatically generate device drivers from the testbench of any RTL IP. The only manual step required is to tag the states corresponding to the different device functionalities. The Extended Finite State Machines (EFSMs) are then used to create a correct-by-construction two-level device driver: the lower level deals with architectural choices, while the higher one is derived from the EFSMs and it implements the communication protocols. The effectiveness of this methodology has been proved by applying it to a platform provided by STMicroelectronics. |
| Starting Page | 1500 |
| Ending Page | 1505 |
| File Size | 302741 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424437818 |
| ISSN | 15301591 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-04-20 |
| Publisher Place | France |
| Access Restriction | Subscribed |
| Rights Holder | European Design Automation Association (EDAA) |
| Subject Keyword | Object oriented modeling System testing Automatic testing Embedded system System-level design Access protocols Error correction Manuals Automata Design engineering |
| Content Type | Text |
| Resource Type | Article |
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