NDLI: Hierarchical architecture of flash-based storage systems for high performance and durability

Content Provider	IEEE Xplore Digital Library
Author	Sanghyuk Jung Jin Hyuk Kim Yong Ho Song
Copyright Year	2009
Description	Author affiliation: School of Electronics and Computer Engineering, Hanyang University, Korea (Sanghyuk Jung; Yong Ho Song) \|\| Samsung Electronics. Co., Ltd. Korea (Jin Hyuk Kim)
Abstract	The use of NAND flash memory for building permanent storage has been increasing in many embedded systems due to properties such as non-volatility and low enery consumption. The persistent requirements for high storage capacity have given rise to the increase of bit density per cell as in multi-level cells but this has come at the expense of performance and has resulted in degradation of durability. In this paper, we introduce a complementary approach to boost the performance and durability of MLC-based storage systems by employing a non-volatile buffer that temporarily holds the data heading to MLCs. We also propose algorithms to efficiently eliminate unnecessary write and erase operations in MLCs by performing a pre-merge in the buffer. Our experiments show that the proposed approach can increase performance by up to 4 times and durability by 4 times by adding only a small hardware cost.
Starting Page	907
Ending Page	910
File Size	358253
Page Count	4
File Format	PDF
ISBN	9781605584973
ISSN	0738100X
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-07-26
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Buffer storage Buildings Energy storage Embedded system Energy consumption Degradation Nonvolatile memory Hardware Costs Flash Translation Layer Storage Systems Flash Memory
Content Type	Text
Resource Type	Article

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