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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jia-Wei Fang Wong, M.D.F. Yao-Wen Chang |
| Copyright Year | 2009 |
| Description | Author affiliation: Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan (Jia-Wei Fang; Yao-Wen Chang) || Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, USA (Wong, M.D.F.) |
| Abstract | In this paper, we present a novel flip-chip routing algorithm for package-board co-design. Unlike the previous works that can consider only either free- or pre-assignment routing, our router is the first work in the literature that can handle both the free-and pre-assignment routing. Based on the computational geometry techniques (e.g., the Delaunay triangulation and the Voronoi diagram), the router applies a unified network-flow formulation to perform congestion estimation for the pre-assignment routing. According to the congestion map, the network-flow formulation can also consider the free-assignment nets during the routing for the pre-assignment ones. Then, the router modifies the network-flow formulation to optimally assign and route the free-assignment nets, considering the routed pre-assignment nets. With the package and board co-design flow, we can achieve 100% routing completion. Experimental results based on industry designs demonstrate the high-quality of our algorithm. |
| Starting Page | 336 |
| Ending Page | 339 |
| File Size | 447281 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781605584973 |
| ISSN | 0738100X |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-07-26 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Association for Computing Machinery, Inc. (ACM) |
| Subject Keyword | Routing Algorithm design and analysis Electronics packaging Computational geometry Integrated circuit packaging Integrated circuit layout Very large scale integration Signal design Printed circuits Physical Design Detailed Routing Global Routing |
| Content Type | Text |
| Resource Type | Article |
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