NDLI: Interconnection fabric design for tracing signals in post-silicon validation

Content Provider	IEEE Xplore Digital Library
Author	Xiao Liu Qiang Xu
Copyright Year	2009
Description	Author affiliation: CUhk REliable computing laboratory (CURE), Department of Computer Science & Engineering, The Chinese University of Hong Kong, Shatin, N.T., Hong Kong (Xiao Liu; Qiang Xu)
Abstract	Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits. One effective technique that provides real-time visibility to the circuit under debug (CUD) is to monitor and trace internal signals during its normal operation. Typically, a large number of signals are tapped and a subset of them are selected to be observed in each debug process. These trace signals need to be transferred to on-chip buffers and/or off-chip trace ports for analysis. Existing solutions use multiplexer trees or specific access networks to conduct the above duty, which, however, either provide less visibility to the CUD or result in high hardware cost. In this paper, we propose a novel trace signal interconnection fabric design to tackle the above problem. Experimental results on benchmark circuits show the efficacy of the proposed solution.
Starting Page	352
Ending Page	357
File Size	433547
Page Count	6
File Format	PDF
ISBN	9781605584973
ISSN	0738100X
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-07-26
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Fabrics Signal design Integrated circuit interconnections Signal processing Costs Computer bugs Signal analysis Multiplexing Hardware Circuit testing Trace-Based Debug Post-Silicon Validation
Content Type	Text
Resource Type	Article

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