NDLI: Polynomial datapath optimization using partitioning and compensation heuristics

Content Provider	IEEE Xplore Digital Library
Author	Sarbishei, O. Alizadeh, B. Fujita, M.
Copyright Year	2009
Description	Author affiliation: Dept. of Electr. Eng., Sharif Univ. of Technol., Tehran, Iran (Sarbishei, O.)
Abstract	Datapath designs that perform polynomial computations over $Z_{2}$ $^{n}$ are used in many applications such as computer graphics and digital signal processing domains. As the market of such applications continues to grow, improvements in high-level synthesis and optimization techniques for multivariate polynomials have become really challenging. This paper presents an efficient algorithm for optimizing the implementation of a multivariate polynomial over $Z_{2}$ $^{n}$ in terms of the number of multipliers and adders. This approach makes use of promising heuristics to extract more complex common sub-expressions from the polynomial compared to the conventional methods. The proposed algorithm also utilizes a canonical decision diagram, Horner-expansion diagram (HED) [1] to reduce the polynomial's degree over $Z_{2}$ $^{n}.$ Experimental results have shown an average saving of 27% and 10% in terms of the number of logic gates and critical path delay respectively compared to existing high-level synthesis tools as well as state of the art algebraic approaches.
Starting Page	931
Ending Page	936
File Size	382497
Page Count	6
File Format	PDF
ISBN	9781605584973
ISSN	0738100X
DOI	10.1145/1629911.1630151
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-07-26
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Polynomials Application software High level synthesis Signal processing algorithms Signal design Computer graphics Digital signal processing Logic gates Logic functions Delay Modular HED Polynomial Datapath High-Level Synthesis
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Polynomial datapath optimization using partitioning and compensation heuristics

Modular Datapath Optimization and Verification Based on Modular-HED

Improved heuristics for finite word-length polynomial datapath optimization

Polynomial datapath synthesis and optimization based on vanishing polynomial over $Z^{m}$ and algebraic techniques

Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination

Optimization Of Hierarchical Designs Using Partitioning And Resynthesis

Improved heuristics for finite word-length polynomial datapath optimization

Multiple-Width Bus Partitioning Approach to Datapath Synthesis

Automatic High-Level Data-Flow Synthesis and Optimization of Polynomial Datapaths Using Functional Decomposition

Polynomial datapath optimization using partitioning and compensation heuristics

Similar Documents

Polynomial datapath optimization using partitioning and compensation heuristics

Modular Datapath Optimization and Verification Based on Modular-HED

Improved heuristics for finite word-length polynomial datapath optimization

Polynomial datapath synthesis and optimization based on vanishing polynomial over $Z^{m}$ and algebraic techniques

Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination

Optimization Of Hierarchical Designs Using Partitioning And Resynthesis

Improved heuristics for finite word-length polynomial datapath optimization

Multiple-Width Bus Partitioning Approach to Datapath Synthesis

Automatic High-Level Data-Flow Synthesis and Optimization of Polynomial Datapaths Using Functional Decomposition

Polynomial datapath optimization using partitioning and compensation heuristics