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Content Provider | IEEE Xplore Digital Library |
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Author | Kui Wang Lian Duan Xu Cheng |
Copyright Year | 2006 |
Description | Author affiliation: Dept. of Comput. Sci., Peking Univ., Beijing (Kui Wang; Lian Duan; Xu Cheng) |
Abstract | In the traditional ASIC flow, clock skew scheduling (CSS), as a method to improve timing, is usually employed during the CTS (clock tree synthesis) step while front-end tools do not take clock skew as a manageable resource. This limits the potential of the subsequent CSS. To overcome such limitations, we design an enhanced CSS algorithm ExtensiveSlackBalance and integrate it into the back-annotation and re-optimization iterations of the current industrial flow. Experiment results show that, the clock frequency can be improved to 26.2% on average compared to 6.4% in the traditional ASIC flow |
Sponsorship | SiCda EDA Consortium IEEE Circuits & Syst. Soc. IEEE CASS/CANDE CANDE CEDA |
Starting Page | 951 |
Ending Page | 954 |
File Size | 1706591 |
Page Count | 4 |
File Format | |
ISBN | 1595933816 |
ISSN | 0738100X |
DOI | 10.1109/DAC.2006.229417 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2006-07-24 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Association for Computing Machinery, Inc. (ACM) |
Subject Keyword | Clocks Cascading style sheets Algorithm design and analysis Job shop scheduling Application specific integrated circuits Processor scheduling Delay effects Scheduling algorithm Sequential circuits Timing back-annotation Algorithms clock skew skew scheduling logic synthesis |
Content Type | Text |
Resource Type | Article |
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