NDLI: Ultra-Fast-Turn-On Medium Power Double Thyristor

Content Provider	IEEE Xplore Digital Library
Author	Vaher, G. Udal, A. Sivonen, M. Paomets, V.
Copyright Year	1995
Description	Author affiliation: DGT Ltd, Pirita tee 20, Tallinn EE0103, ESTONIA. (Vaher, G.) \|\| Tallinn Technical Univ., Inst. of Electronics, Akadeemia tee 1, Tallinn EE0026, ESTONIA. Temporal: Uppsala Univ., Scanner Lab., Villavägen 4, Uppsala S775121,SWEDEN. (Udal, A.) \|\| TONDI ELECTRONICS Ltd., Pärnu Rd. 142, Tallinn EE0100, ESTONIA,. (Paomets, V.) \|\| NOPTEL OY, Teknologiatie 2, Oulu SF90570, FINLAND. (Sivonen, M.)
Abstract	A medium power (80V, 50A pulsed) Silicon double thyristor with turn-on speed of 10ns range has been designed and fabricated. The integrated launching thyristor allows to trigger the device with a low signal of CMOS logic output range, so that the resulting gate turn-on charges are at least a factor of 1000 smaller than the equivalent power MOS transistor gate-control charges. The high tum-on sensitivity has given a possibility to increase and stabilize the holding current level via introducing the cathode shorting and thereby also assure natural turn-off of the thyristor for time intervals between current pulses. Numerical analysis by simulators DYNAMIT-1DT, 2DT has confirmed that the key factors for turn-on rise time minimization are the minority carrier diffusion transit times through the quasineutral regions of the p- and n-bases. Also it has been shown by simulations that the tum-on delay time is defined largely by the auxiliary thyristor and applied gate current only and the practically observed rise times are rather inductance-limited than device-limited. Design methodology for this medium power range differs from conventional Silicon high power (1000V-1000A) methodology, and in some respect resembles the of future downscaled SiC power devices design.
Starting Page	647
Ending Page	650
File Size	1158502
Page Count	4
File Format	PDF
ISBN	286332182X
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-09-25
Publisher Place	The Netherlands
Access Restriction	Subscribed
Rights Holder	Editions Frontieres
Subject Keyword	Thyristors Silicon CMOS logic circuits Logic devices MOSFETs Cathodes Numerical analysis Analytical models Numerical simulation Delay effects
Content Type	Text
Resource Type	Article

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