NDLI: Failure isolation for advanced packages using time-domain reflectometry

Content Provider	IEEE Xplore Digital Library
Author	Boyu Zheng Hunat, C. Weiliang Yuan Suthiwongsunthorn, N. Chungpaiboonpatana, S.
Copyright Year	2011
Description	Author affiliation: United Test and Assembly Center Ltd, 5 Serangoon North Avenue 5, Singapore 554916 (Boyu Zheng; Hunat, C.; Suthiwongsunthorn, N.; Chungpaiboonpatana, S.) \|\| Samsung Electronics, Yongin-City, Gyeonggi-Do 446-711, Korea (Weiliang Yuan)
Abstract	Failure analysis (FA) of integrated circuit (IC) packages is critical to deliver IC products with good quality. With IC packages being increasingly complex, FA becomes much more challenging than early days. This paper presents failure isolation for advanced packaging using time-domain reflectometry (TDR). One case of ball grid array (BGA) is introduced to demonstrate the utilization of TDR FA in UTAC. Flip-chip BGA (fcBGA) is the other focus of this paper, especially the package with small body size and short signal transmission path. TDR results that could give engineers misleading information are discussed. Software simulation is utilized to assist the fault isolation. It's shown to be an excellent way to locate the failure spot accurately.
Starting Page	699
Ending Page	704
File Size	1627048
Page Count	6
File Format	PDF
ISBN	9781457719837
e-ISBN	9781457719820
e-ISBN	9781457719813
DOI	10.1109/EPTC.2011.6184509
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-12-07
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Substrates Failure analysis Software Time domain analysis Integrated circuits Impedance
Content Type	Text
Resource Type	Article

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