NDLI: Simple-structure, generally applicable chip-scale package

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Motorola's PowerPC 603 and PowerPC 604 RISC microprocessor: the C4/ceramic-ball-grid array interconnect technology

High I/O plastic ball grid array packages-AT&T Microelectronics experience

A comparison of a single tier and double tier enhanced PBGA package design

Thermal sensitivity analysis for the 119 PBGA-a framework for rapid prototyping

Hole grid array (HGA)-a new tape carrier package with high count I/O

A low-cost metal ball grid array for flip chip die

Ceramic mini-ball grid array package for high speed device

Ion implantation issues in microelectronic device manufacturing

Yield management in microelectronic manufacturing

Noise characterization and sensitivity analysis of IC packages

Bottom-side wave solder process compatibility for 14 and 16-pin gull wing SOICs

Development of molding compounds for BGA

Gold wire bonding onto flexible polymeric substrates

Fine pitch wire bonding development using statistical design of experiment

Heavy aluminum wire bonding-a state of the art assessment

A new approach to using anisotropically conductive adhesives for flip chip assembly

Reliability and failure mechanism of isotropically conductive adhesives joints

Fine pitch COG interconnections using anisotropically conductive adhesives

A novel elastomeric connector for packaging interconnections, testing and burn-in applications

A new contact/connector design for high-density, high-performance connectors

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Field-based analysis of a high pincount board connector

SPICE-models for high pincount board connectors

Modern connector design tools assure high speed signal integrity

18 fiber cylindrical cable connector (FLASH contract)

Polymer molded lenses for optoelectronics

Flat panel display packaging

The evolution of easily installed fiber optic connectors

Optoelectronic packaging and polymer waveguides for multichip module and board-level optical interconnect applications

Single-mode optical waveguide using siloxane polymer on Cu-polyimide substrate

Direct-bonding and flip-chip bonding technologies applied to Si/PLZT spatial light modulator fabrication

Thermal solutions to Pentium processors in TCP in notebooks and sub-notebooks

E-TQHS: an enhanced performance tape carrier package

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Ultra-thin and crack-free bottom leaded plastic (BLP) package design

Package warpage evaluation for high performance PQFP

High frequency performance of multilayer ceramic capacitors

Design of high power SAW filter by series-parallel connection

Advanced multi-layer ceramic surface-mount functional components for telecommunications equipment

Electrical modeling of CBGA packages

Characterization of 6H-SiC JFETs for use in a temperature monitor operating from 25/spl deg/C to 350/spl deg/C

Fabrication procedures and characterization of 6H-SiC MESFETs for use in high temperature electronics

Predicted failure criterion (von-Mises stress) for moisture-sensitive plastic packages

The effect of internal package delaminations on the thermal performance of PQFP, thermally enhanced PQFP, LOC, and BGA packages

Die cracking in flip-chip-on-board assembly

Liquid encapsulant stress variations as measured with the ATCO4 assembly test chip

Experience with nondestructive acoustic inspection of power IC's

Leak rate measurement comparisons [package seals]

Reliability considerations of laser diodes for optical communication system application

Modeling and simulation of switching noise with the associated package resonance for high speed digital circuits

A novel method of measuring microelectronic interconnect transmission line parameters and discontinuity equivalent electrical parameters using multiple reflections

Sub-nanohenry inductance measurement using a zero-parasitic-inductance probe system

Microwave characterization of flip-chip MMIC components

A simultaneous switching noise design algorithm for leadframe packages with or without ground plane

Simulation and modeling of mode conversion at vias in multilayer interconnections

POLO-parallel optical links for gigabyte data communications

A low cost, high performance optical interconnect

Low-power, parallel photonic interconnections for multi-chip module applications

Thermal management of VCSEL-based optoelectronic modules

Thermosonic flip-chip bonding for an 8/spl times/8 VCSEL array

High performance vertical-cavity surface-emitting laser diodes with a Au-plated heat spreading layer

Compatibility of conventional ferrule with step-ferrule for angled convex optical connector

Predicted curvatures and stresses in a fiber-optic interconnect subjected to bending

Self-holding optical waveguide switch controlled by micromechanisms

Bonding of epitaxial lift off (ELO) devices with AuSn

A reliable die attach method for high power semiconductor lasers and optical amplifiers

Determining waveguide coupling efficiency by observing reflected light from the end face

Reliability and moisture sensitivity evaluation of 225-pin, 2 layered overmolded (OMPAC) ball grid array package

Diffusion model to derate moisture sensitive surface mount ICs for factory use conditions

Level 1 crackfree plastic packaging technology

Passivation cracking mechanism in high density memory devices assembled in SOJ packages adopting LOC die attach technique

Investigation on the effect of copper leadframe oxidation on package delamination

S-pad implementation; total plastic package crack solution for non-moisture sensitive package

A new criterion for package integrity under solder reflow conditions

Rapid prototyping MCMs with MCM-CF technology

MCM design and implementation rapid prototyping

An optimal implementation of a superscalar architecture

Design tools for mixed analog, digital and RF MCMs for wireless telecommunication applications

Interconnect technologies for the 90's

Characteristics and potential application of polyimide-core-bump to flip chip

A new laminate material for high performance PCBs: liquid crystal polymer copper clad films

Repairability of underfill encapsulated flip-chip packages

Area bonding conductive (ABC) adhesives for flex circuit connection to LTCC/MCM substrates

Autocatalytic gold plating process for electronic packaging applications

Copper-diamond composite substrates for electronic components

CUVAR-a new controlled expansion, high conductivity material for electronic thermal management

Optoelectronics for large scale optical backplanes

Skew-free parallel optical links and their array technology

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Optical coupling and alignment tolerances in optoelectronic array interface assemblies

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Performance modeling of the interconnect structure of a 3-dimensionally integrated RISC-processor/cache-system

Electrical packaging requirements of CMOS ULSI devices, and fundamental electrical performance limits of single chip packages

Tiled silicon: a packaging alternative to large silicon chips

Software support for packaging design of wireless equipment (SPEC-a simulator for RF active, passive devices, and interconnections)

Package Design Advisor-mechanical, electrical and thermal analysis in one CAD tool

Scaling tradeoffs for CMOS-based VLSI packaging

Development of high density memory IC package by stacking IC chips

High performance 3D MCM using silicon microtechnologies

Performance improvement of the memory hierarchy of RISC-systems by application of 3-D-technology

Performance and reliability of a three-dimensional plastic moulded vertical multichip module (MCM-V)

Development of GE's plastic thin-zero outline package (TZOP) technology

Performance of TI high density interconnect for 1 GHz digital MCM applications

Assembly of a prototype flip-chip-on-glass liquid crystal display

Polycyanate die-attach adhesives for microelectronic applications

Multi layer film adhesive for IC packaging applications

Dynamic mechanical analysis of silver/glass die attach material

Dependance of electric conduction on film thickness of conductive adhesives

Interfacial adhesion of fluoropolymer composites to commercial copper foils subjected to aqueous photolithographic processes

The effect of adhesive surface chemistry and morphology on package cracking in tapeless lead-on-chip (LOC) packages

Polyimide stress cushion for multichip glass-ceramic module packaging

Challenges in the design and packaging of optical amplifiers for multiwavelength lightwave communication systems

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A surface mount type single-mode laser module using passive alignment

Laser diode array packaging for coupling to optical polyimide waveguides in optoelectronic multichip modules

Optical MCM interconnect using hybrid integration of GaAs optoelectronics with a glass signal routing layer

Packaging technology for wide bandwidth, high optical coupling pigtailed optoelectronic modules

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Electrical characteristics of metal-Al/sub 2/O/sub 3/-Si structure deposited by ICBE technique for application of semiconductor device fabrication

Improved yield and performance of ball-grid array packages: design and processing guidelines for uniform and non-uniform arrays

Poling effects on lead zirconate titanate piezoelectric ceramics

Extrusion and properties of lead zirconate titanate piezoelectric ceramics

Package plane model validation using test chip, test package, and test board

Effects of dopants and Ti/Sr ratio on the properties of SrTiO/sub 3/ electroceramic components

Effects of bond temperature and pressure on microstructures of tape automated bonding (TAB) inner lead bonds (ILB) with thin tape metallization

Relationship of adhesion, delamination, preconditioning and preplating effects at the plastic to leadframe interface

Reliability testing of solder joints in surface mounted assembly using real-time holographic interferometry

Optical device module packages for subscriber incorporating passive alignment techniques

Performance enhancements in Edquad plastic packages

A new bonding mechanism of 50 /spl mu/m pitch TAB-ILB with 0.25 /spl mu/m Sn plated Cu lead

Electrical characterization and modeling of simultaneous switching noise for leadframe packages

Thermal enhancement of flip-chip packages with radial-finger-contact spring

Application of the flip-chip bonding technique to the 10 Gbps laser diode module

Evaluation of a thermal design tool for electronics-a three chip MCM as a case study

Nonlinear transient thermal analysis using circuit simulation techniques

Adhesion test standardization for multichip module packages

High temperature applications for IC plastic encapsulated packages

Time-domain interconnect model generation of Alloy-42 leadframes

Aluminum electromigration of 1-mil bond wire in octal inverter integrated circuits

The use of heat pipes in the cooling of portables with high power packages-A case study with the Pentium processor-based notebooks and sub-notebooks

Failure mechanism of hole formation in laser welding technique for optoelectronic packaging

A case study of high pin count area array ceramic package crack

Craze and instability of polyimide thin films and its effects on high density interconnects

Ceramic column grid array for flip chip applications

Linear finite element stress simulation of solder joints on 225 I/O plastic BGA package under thermal cycling

Fiber optics structural mechanics

High performance GaAs/AlGaAs vertical-cavity surface-emitting lasers designed for cryogenic applications

Temperature and stress time history responses in electronic packaging

A PC program that generates a model of the parasitics for BGA packages

High ohmic value resistive inks

Crack initiation and growth in electronic packages

The importance of molding compound chemical shrinkage in the stress and warpage analysis of PQFPs

Optimal design of an inter-board strain-relief for high-reliability surface mount attachment

Reliability, lifetime prediction and accelerated testing of prospective alternatives to lead based solders

Simulation of three-dimensional wirebond deformation during transfer molding

Effect of material properties on the fatigue life of dual solder (DS) ceramic ball grid array (CBGA) solder joints

Thermal and electrical characterization of the metal ball grid array (MBGA)

Reactions of high lead solders with BIOACT EC-7R semi-aqueous cleaning reagent

Effect of PCB finish on the reliability and wettability of ball grid array packages

Impact of PBGA-ball-coplanarity on formation of solder joints

Polymer/metal composite for interconnection technology

Temperature dependent mechanical behavior of plastic packaging materials

Stable non-cyanide electroless gold plating which is applicable to manufacturing of fine pattern printed wiring boards

Palladium plating: A lead free finish for IC leadframes

Reliability studies of surface mount, solder joints-effect of Cu-Sn intermetallic compounds

A low cost MCM-D process for flip chip and wirebonding applications

Optical component technologies for FTTH applications

Integrated fiber optic transmitters and receivers for SONET/ATM applications

12/spl times/622 Mb/s optical receiver array module for parallel digital datalinks

A new packaging technique for an optical 90/spl deg/-hybrid balanced receiver using planar lightwave circuits

Design of a compact, high speed optical transceiver using two step overmolding

Hermeticity lifetime of a 63Sn37Pb solder sealed optical fiber feedthrough

Laser weld process improvements for optical isolator assembly

Thermal modeling of high performance packages in portable computers

Performance comparison of thermally enhanced plastic (TEP) packages

Development, validation and application of a thermal model of a plastic quad flat pack

Improved approximations for structural reliability in thermal analysis

Transient energy management strategies for portable systems

Numerical simulation of natural convection cooled electronic enclosures

Area array solder interconnection technology for the three-dimensional silicon cube

Reliability investigations of fluxless flip-chip interconnections on green tape ceramic substrates

Reliability and analytical evaluations of no-clean flip-chip assembly

Interfacial reactions with lead (Pb)-free solders

Reflowable Sn-Pb bump formation on Al pad by a solder bumping method

Flip chip attachment of silicon devices using substrate ball bumping and the technology evaluation on test assemblies for 20 Gbit/s transmission

Solid type cavity fill and under fill materials for new IC packaging applications

Organic coatings and the challenge-no clean presents

Clean Tablet; innovation on the IC packaging material and process

Resistance to soldering heat by plastic SMD devices

Flip-chip packaging using PES (Printing Encapsulation Systems) and PES underfill epoxy resin

An investigation of conductive polymer flip chip attachment in multichip module applications

Analysis of design of experiments used as a tool to implement environmentally safe cleaning process in manufacturing [hybrid ICs]

Optical performance of low-cost self-aligned MCM-D based optical data links

Fluidic self-assembly of silicon microstructures

A reconfigurable optoelectronic interconnect technology for multi-processor networks

Alignable lift-off transfer of device arrays via a single polymeric carrier membrane

A modular adapter system for fiber optics

Design and fabrication of low noise high diffraction efficiency diffractive optical elements

Alignment tolerancing of free-space MCM-to-MCM optical interconnects

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Simple-structure, generally applicable chip-scale package

Content Provider	IEEE Xplore Digital Library
Author	Matsuda, S. Kata, K. Hagimoto, E.
Copyright Year	1995
Description	Author affiliation: VLSI Package Dev. Dept., NEC Corp., Sagamihara, Japan (Matsuda, S.; Kata, K.; Hagimoto, E.)
Abstract	One way to provide the ultimate shrinkage, required for the fabricating of small, lightweight, and high-performance electrical devices is by using chip-scale packaging. We have therefore developed an original chip-scale package called fine-pitch BGA (FPBGA), which has a very simple structure, consisting of carrier tape, an adhesive layer, and solder bumps. Its assembly process is similar to that of TCP assembly, and FPBGA has many advantages over other IC mounting processes and other similar chip-scale packages.
Starting Page	218
Ending Page	223
File Size	1150889
Page Count	6
File Format	PDF
ISBN	0780327365
DOI	10.1109/ECTC.1995.514387
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-05-21
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Chip scale packaging Integrated circuit packaging Assembly Packaging machines Costs Testing Sockets Fabrication Resins Conductive films
Content Type	Text
Resource Type	Article

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