NDLI: Biconditional BDD: A novel canonical BDD for logic synthesis targeting XOR-rich circuits

Content Provider	IEEE Xplore Digital Library
Author	Amaru, Luca Gaillardon, Pierre-Emmanuel De Micheli, Giovanni
Copyright Year	2013
Description	Author affiliation: Integrated Systems Laboratory (LSI), EPFL, Switzerland (Amaru, Luca; Gaillardon, Pierre-Emmanuel; De Micheli, Giovanni)
Abstract	We present a novel class of decision diagrams, called Biconditional Binary Decision Diagrams (BBDDs), that enable efficient logic synthesis for XOR-rich circuits. BBDDs are binary decision diagrams where the Shannon's expansion is replaced by the biconditional expansion. Since the biconditional expansion is based on the XOR/XNOR operations, XOR-rich logic circuits are efficiently represented and manipulated with canonical Reduced and Ordered BBDDs (ROBBDDs). Experimental results show that ROBBDDs have 37% fewer nodes on average compared to traditional ROBDDs. To exploit this opportunity in logic synthesis for XOR-rich circuits, we developed a BBDD-based One-Pass Synthesis (OPS) methodology. The BBDD-based OPS is capable to harness the potential of novel XOR-efficient devices, such as ambipolar transistors. Experimental results show that our logic synthesis methodology reduces the number of ambipolar transistors by 49.7% on average with respect to state-of-art commercial logic synthesis tool. Considering CMOS technology, the BBBD-based OPS reduces the device count by 31.5% on average compared to commercial synthesis tool.
Starting Page	1014
Ending Page	1017
File Size	512468
Page Count	4
File Format	PDF
ISBN	9781467350716
ISSN	15301591
e-ISBN	9783981537000
DOI	10.7873/DATE.2013.211
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-03-18
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	European Design Automation Association (EDAA)
Subject Keyword	Boolean functions Transistors CMOS integrated circuits CMOS technology Binary decision diagrams Logic gates
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Biconditional bdd: a novel canonical bdd for logic synthesis targeting xor-rich circuits.

Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits

Reversible Logic Synthesis via Biconditional Binary Decision Diagrams

Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form

Boolean technology mapping for both ECI and CMOS circuits based on permissible functions and binary decision diagrams

BDD decomposition for mixed CMOS/PTL logic circuit synthesis

Biconditional-BDD Ordering for Autosymmetric Functions

BDD based detection algorithm for XOR-type logic

Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis

Biconditional BDD: A novel canonical BDD for logic synthesis targeting XOR-rich circuits

Similar Documents

Biconditional bdd: a novel canonical bdd for logic synthesis targeting xor-rich circuits.

Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits

Reversible Logic Synthesis via Biconditional Binary Decision Diagrams

Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form

Boolean technology mapping for both ECI and CMOS circuits based on permissible functions and binary decision diagrams

BDD decomposition for mixed CMOS/PTL logic circuit synthesis

Biconditional-BDD Ordering for Autosymmetric Functions

BDD based detection algorithm for XOR-type logic

Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis

Biconditional BDD: A novel canonical BDD for logic synthesis targeting XOR-rich circuits