NDLI: A fast-lock digital delay-locked loop controller

Content Provider	IEEE Xplore Digital Library
Author	Bo Ye Tianwang Li Xingcheng Han Min Luo
Copyright Year	2009
Description	Author affiliation: Department of Integrated Circuit & Communication Software, Wuhan University, 430079, China (Tianwang Li) \|\| Integrated Silicon Solution(Shanghai) Co., Ltd, 201203, China (Xingcheng Han) \|\| Lucent Technologies Optical Networks Co., Ltd., Shanghai, 200233, China (Min Luo) \|\| Institute of Microelectronics, Shanghai University of Electric Power, 200090, China (Bo Ye)
Abstract	A fast-lock digital delay-locked loop(DLL) is presented in this paper. A delay compensation circuit (DCC ) is used to achieve short lock time. The DLL's initial value is controlled by the DCC, so that initial delay time of the delay line can be located in the expected scope and there is only one stable state in various process, voltage, and temperature (PVT) conditions. Since the delay time of each delay cell changes based on the variations of PVT conditions, the output values generated by the DCC are determinate of the PVT conditions in the chip. Thus the DLL's initial state changes according to the detected PVT conditions, and the initial large phase difference is eliminated by the DCC. So it can be fast locked and only has one stable state. The proposed digital DLL overcomes the drawbacks of traditional DLL which may have more than one stable state. The HSPICE simulation results show that the proposed digital DLL circuit achieves fine accuracy and the maximum lock time is 16 clock $cycles^{1}.$
Starting Page	809
Ending Page	812
File Size	2484916
Page Count	4
File Format	PDF
ISBN	9781424438686
DOI	10.1109/ASICON.2009.5351573
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-10-20
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Digital control Delay effects Clocks Logic Delay lines Circuit simulation Digital systems Voltage Timing Temperature PVT Delay-locked loops (DLL) delay compensation circuit (DCC)
Content Type	Text
Resource Type	Article

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