NDLI: Variation RLC model of interconnect based on weibull distribution

Content Provider	IEEE Xplore Digital Library
Author	Li Jianwei Yang Yintang Dong Gang Wang Zeng
Copyright Year	2009
Description	Author affiliation: Xidian University, Xi'an 710071, China (Yang Yintang; Dong Gang; Wang Zeng) \|\| Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, Microelectronics Institute, Xidian University, Xi'an 710071, China (Li Jianwei)
Abstract	Based on Weibull Distribution, a statistical RLC model considering process variations for the efficient analysis interconnect delay is proposed. The statistical RLC model can be used for optimizations, like placement, interconnect synthesis and static timing analysis (STA). Although some delay models of interconnect have been presented, like Elmore, equivalent Elmore, D2M and WED, some of them have not considered the effects of inductances and every one of them have not considered the process variations. The model proposed in this paper has considered all of them. The effectiveness of the proposed model is proved through experimental results. Compared with HSPICE, the result show that the error of 50% delay is less than 1%, the error of mean and the error of the average deviation in Monte Carlo analysis are less than $1%^{1}.$
Starting Page	1240
Ending Page	1243
File Size	1357639
Page Count	4
File Format	PDF
ISBN	9781424438686
DOI	10.1109/ASICON.2009.5351207
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-10-20
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Weibull distribution Integrated circuit interconnections RLC circuits Delay effects Electronic mail Integrated circuit modeling Monte Carlo methods Laboratories Timing Shape Process variations RLC interconnect delay Statistical model
Content Type	Text
Resource Type	Article

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