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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Okereke, R. Sitaraman, S.K. |
| Copyright Year | 2013 |
| Description | Author affiliation: George W. Woodruff Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA, USA (Okereke, R.; Sitaraman, S.K.) |
| Abstract | Compliant interconnects have been studied in universities and industry over the past decade, as compliant interconnects could mechanically decouple the die from the substrate and thus could reduce the stresses in the die. In this work, we present the design, fabrication and modeling results of three-path electroplated compliant interconnect that addresses several of the challenges associated with various other compliant interconnects. Sample interconnects were fabricated on 4" wafers to enable experimental validation of the designed microstructures. There were about 8300 interconnects on each 20 × 20 $mm^{2}$ chip in area-array layout. The interconnects were subjected to compliance testing. In parallel to the experiments, finite-element simulations were carried out to determine the mechanical compliance and the electrical resistance of the interconnects as well as their thermo-mechanical reliability. It is seen that the out-of-plane mechanical compliance will be more than 1 mm/N, several orders of magnitude greater than solder bump interconnects, and from a reliability perspective, the interconnects will last at least 1000 thermal cycles. |
| Sponsorship | IEEE Components, Packaging Manuf. Technol. Soc. |
| Starting Page | 129 |
| Ending Page | 135 |
| File Size | 1625163 |
| Page Count | 7 |
| File Format | |
| ISBN | 9781479902330 |
| ISSN | 05695503 |
| e-ISBN | 9781479902323 |
| DOI | 10.1109/ECTC.2013.6575562 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-05-28 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Resistance Stress Finite element analysis Assembly Fabrication Substrates Inductance |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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