NDLI: Analog VLSI implementation of support vector machine learning and classification

Content Provider	IEEE Xplore Digital Library
Author	Sheng-Yu Peng Minch, B.A. Hasler, P.
Copyright Year	2008
Description	Author affiliation: Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA (Sheng-Yu Peng)
Abstract	We propose an analog VLSI approach to implementing the projection neural networks adapted for the support vector machine with radial-basis kernel functions, which are realized by a proposed floating-gate bump circuit with the adjustable width. Other proposed circuits include simple current mirrors and log-domain Alters. Neither resistors nor amplifiers are employed. Therefore it is suitable for large-scale neural network implementations. We show the measurement results of the bump circuit and verify the resulting analog signal processing system on the transistor level by using a SPICE simulator. The same approach can also be applied to the support vector regression. With these analog signal processing techniques, a low-power adaptive analog system without any analog-to-digital convertor but with the capability of learning, classifying, and regressing becomes feasible.
Starting Page	860
Ending Page	863
File Size	654760
Page Count	4
File Format	PDF
ISBN	9781424416837
DOI	10.1109/ISCAS.2008.4541554
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-05-18
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Very large scale integration Support vector machines Support vector machine classification Machine learning Circuits Neural networks Adaptive signal processing Kernel Mirrors Resistors
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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