NDLI: Analog circuit for synapse neural networks VLSI implementation

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Analog circuit for synapse neural networks VLSI implementation

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Analog circuit for synapse neural networks VLSI implementation

Content Provider	IEEE Xplore Digital Library
Author	Chible, H.
Copyright Year	2000
Description	Author affiliation: Lebanese Univ., Beirut, Lebanon (Chible, H.)
Abstract	In this paper the author presents an analog VLSI circuit to implement the synapse operation in artificial neural network systems. This circuit is a two-quadrant (or four-quadrant) analog multiplier. The output of the synapse circuit is in current and it is proportional to the multiplication of two input voltages: the weight voltage and the pattern information input voltage (or the output voltage of the neuron). The main feature of the multiplier is the high value of the weight voltage range, which varies between the ground voltage and the supply voltage [0:Vdd].
Starting Page	1004
Ending Page	1007
File Size	644819
Page Count	4
File Format	PDF
ISBN	0780365429
DOI	10.1109/ICECS.2000.913045
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-12-17
Publisher Place	Lebanon
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Analog circuits Neural networks Very large scale integration Neurons Threshold voltage Cities and towns Resistors Transconductance Equations Capacitors
Content Type	Text
Resource Type	Article

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