NDLI: A programmable ENG amplifier with passive EMG neutralization for FES applications

Content Provider	IEEE Xplore Digital Library
Author	Demosthenous, A. Dai Jiang Pachnis, I. Xiao Liu Rahal, M. Donaldson, N.
Copyright Year	2008
Description	Author affiliation: Dept. of Electron. & Electr. Eng., Univ. Coll. London, London (Demosthenous, A.; Dai Jiang; Pachnis, I.; Xiao Liu; Rahal, M.)
Abstract	An integrated amplifier for electroneurogram (ENG) recordings from tripolar cuff electrodes is described. The amplifier is dedicated to urinary incontinence and other functional electrical stimulation (FES) applications. To remove myoelectric (EMG) interference a parallel RC network is used to balance the electrode impedances in the quasi-tripole amplifier configuration. The various ENG amplifier settings, such as resistance and capacitance trimming for the neutralization RC network, amplifier gain and filter cut-off frequencies, are controlled by an external microcontroller which communicates with the embedded SPI (Serial Port Interface) block in the amplifier. By this topology control of the ENG amplifier is executed in software allowing for the system parameters to be re-configured after implantation. The analog system blocks and details of the SPI logic are described. The amplifier was fabricated in a 3-V 0.35-mum BiCMOS process technology and preliminary measured results are reported. Input signals as low as 1muV can be reliably detected. The amplifier occupies an area of $1.5mm^{2}$ and consumes about 1.4mW when configured to detect sub-microvolt neural signals.
Starting Page	1552
Ending Page	1555
File Size	128305
Page Count	4
File Format	PDF
ISBN	9781424416837
DOI	10.1109/ISCAS.2008.4541727
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-05-18
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electromyography Electrodes Neuromuscular stimulation Interference Impedance Electric resistance Capacitance Filters Cutoff frequency Radio control
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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