NDLI: 700MHz RF transceiver of base station for 802.16e

Please wait, while we are loading the content...

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)

2012 IEEE International Conference on Circuits and Systems (ICCAS)

2012 IEEE International Symposium on Circuits and Systems

2011 IEEE International Symposium of Circuits and Systems (ISCAS)

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

2009 IEEE International Symposium on Circuits and Systems

2008 IEEE International Symposium on Circuits and Systems

General Co-Chairs’ Message

Cutting-edge tutorials

Conference committee

Keynote speakers

Special sessions

Enhancing industry participation in ISCAS and Circuits and Systems Society

Table of contents

Design of an ultra-low power SA-ADC with medium/high resolution and speed

A power scalable 6-bit 1.2GS/s flash ADC with power on/off Track-and-Hold and preamplifier

A 52mW $0.56mm^{2}$ 1.2V 12b 120MS/s SHA-Free dual-channel Nyquist ADC based on mid-code calibration

A 0.9V 10-bit 100 MS/s switched-RC pipelined ADC without using a front-end S/H in 90nm CMOS

General analysis on the impact of phase-skew in time-interleaved ADCs

A high-speed 2-D transform architecture with unique kernel for multi-standard video applications

HP422-MoCHA: A H.264/AVC High Profile motion compensation architecture for HDTV

Frame-parallel design strategy for high definition B-frame H.264/AVC encoder

Prediction-based real-time CABAC decoder for high definition H.264/AVC

A HW CABAC encoder with efficient context access scheme for H.264/AVC

New narrowband active noise control systems with significantly less computational requirements

Minimum redundancy MIMO radars

Sliding window online Kernel-based classification by projection mappings

Semi-blind data-selective algorithms for channel equalization

Fixed-point analysis of adaptive filters based on the EDS algorithm

BW extension in shunt feedback transimpedance amplifiers using negative miller capacitance

Tunable transimpedance amplifiers with constant bandwidth for optical communications

A simple class-AB transconductor in CMOS

A −72 dB @ 2 MHz IM3 CMOS tunable pseudo-differential transconductor

Bulk-driven gain-enhanced fully-differential amplifier for VT + 2Vdsat operation

Coefficient decimation approach for realizing reconfigurable finite impulse response filters

A reconfigurable multi-stage frequency response masking filter bank architecture for software defined radio receivers

Concept for an adaptive digital front-end for multi-mode wireless receivers

Filter bank based frequency-domain equalizers with diversity combining

Binary de Bruijn interconnection network for a flexible LDPC/turbo decoder

Network topology estimation through synchronization: A case study on quantum dot CNN

Solving ability of Hopfield Neural Network with scale-rule noise for QAP

Topology identification of an uncertain general complex dynamical network

Wave propagation in oscillators coupled by time-varying resistor with timing mismatch

Constraint modules: An introduction

Recently developed approaches for solving blind deconvolution of MIMO-IIR Systems: Super-exponential and eigenvector methods

Semi-blind channel estimation of MIMO-OFDM systems with pulse shaping

Perturbation analysis of subspace-based semi-blind MIMO channel estimation approaches

Blind identification of MIMO channels with periodic precoders

Blind block synchronization algorithms in cyclic prefix systems

Power-delay optimization in MCML tapered buffers

Improving the power-delay product in SCL circuits using source follower output stage

An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture

Transistor-level programmable MOS analog IC with body biasing

High speed serial interface for mobile LCD driver IC

A two-stator MEMS power generator for cardiac pacemakers

A fully differential CMOS capacitance sensor design, testing and array architecture

Graphene nanoribbon field-effect transistors

Analyzing mixed carbon nanotube bundles: A current density study

Carbon nanotube circuit design choices in the presence of metallic tubes

Bilateral design of mm-wave LNA and receiver front-end in 90nm CMOS

A 700Mbit/s CMOS capacitive feedback front-end amplifier with automatic gain control for broadband optical wireless links

$124dB⋅Hz^{⅔}$ Dynamic range transimpedance amplifier for electronic-photonic channelizer

A 10 Gb/s optical receiver in 0.25 μm silicon-on-sapphire CMOS

An optically powered, free space optical communications receiver

Minimum energy broadcasting in wireless networks (extended abstract)

Minimization of I/O Delay in the architectural synthesis of DSP data flow graphs

A method for verifying deadlock freedom and liveness of petri nets

On the three-dimensional orthogonal drawing of series-parallel graphs (extended abstract)

Versatile graphs for tail-biting convolutional codes

Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC

A 10-bit 8.3MS/s switched-current successive approximation ADC for column-parallel imagers

Predictive timing error calibration technique for RF current-steering DACs

New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise

Capacitor array structure and switch control for energy-efficient SAR analog-to-digital converters

Area efficient controller design of barrel shifters for reconfigurable LDPC decoders

A fault-tolerant, DFA-resistant AES core

Modeling and exploration of a reconfigurable architecture for digital holographic imaging

Leakage-based differential power analysis (LDPA) on sub-90nm CMOS cryptosystems

A motion compensation system with a high efficiency reference frame pre-fetch scheme for QFHD H.264/AVC decoding

Discrete tchebichef transform-A fast 4x4 algorithm and its application in image/video compression

Multiframe image super-resolution using quasi-newton algorithms

Application of scalable visual sensitivity profile in image and video coding

Modeling of the DCT coefficients of images

Target region-aware tone reproduction

A 1.5 bit $5^{th}$ order CT/DT delta sigma class D amplifier with power efficiency improvement

PSRR of bridge-tied load PWM Class D Amps

High slew rate two stage A/AB and AB/AB op-amps with phase lead compensation at output node and local common mode feedback

A simple approach for the implementation of CMOS amplifiers with constant bandwidth independent of gain

A novel topology in RNMC amplifiers with single miller compensation capacitor

VLSI architecture for data-reduced steering matrix feedback in MIMO systems

Hardware-efficient steering matrix computation architecture for MIMO communication systems

A single-FPGA multipath MIMO fading channel simulator

A modified MMSE-SD soft detector for coded MIMO-OFDM systems

The application of lattice-reduction to the K-Best algorithm for near-optimal MIMO detection

Introducing Complex Oscillation Based Test: an application example targeting Analog to Digital Converters

Stability study of the TCP-RED system using detrended fluctuation analysis

Rotation map with a controlling segment and its application to A/D converters

A quantum-dot light-harvesting architecture using deterministic phase control

A method based on a genetic algorithm to find PWL approximations of multivariate nonlinear functions

General-pupose technology for a general-purpose nervous system

Pulse-based signal compression for implanted neural recording systems

Radios for the brain? a practical micropower sensing and algorithm architecture for neurostimulators

Implant electronics for intraocular epiretinal neuro-stimulators

Stimulation and recording of neural tissue, closing the loop on the artifact

Power-aware topology optimization for networks-on-chips

Design target exploration for meeting time-to-market using pareto analysis

A quantitative evaluation of C-based synthesis on heterogeneous embedded systems design

A robust alternate repeater technique for high performance busses in the multi-core era

Input port reduction for efficient substrate extraction in large scale IC’s

Variation-tolerant, low-power PN-code acquisition using stochastic sensor NOC

Capacitive coupling based transient negative bit-line voltage (Tran-NBL) scheme for improving write-ability of SRAM design in nanometer technologies

Low variation current source for 90nm CMOS

Design of process variation tolerant radio frequency low noise amplifier

Binary translation process to optimize nanowire arrays usage

Cross-dimensional quality assessment for low bitrate video

Backward-forward distortion minimization for binary images data hiding

Peceptual distortion metric based on wavelet frequency sensitivity and multiple visual fixations

Adaptive feature selection for digital camera source identification

On the quality assessment of sound signals

A two-neuron cross-correlation circuit with a wide and continuous range of time delay

Fall detection using an address-event temporal contrast vision sensor

Bifurcations in a silicon neuron

A biophysically based dendrite model using programmable floating-gate devices

The time derivative neuron

Quadrature generation techniques for frequency multiplication based oscillators

Improved 6.7GHz CMOS VCO delay cell with up to seven octave tuning range

A fully differential charge pump with accurate current matching and rail-to-rail common-mode feedback circuit

A charge-pump based 0.35-um CMOS RF switch driver for multi-standard operations

Low-voltage bulk-driven mixer with on-chip balun

A 65nm 10GHz pipelined MAC structure

A new look-up table-based multiplier/squarer design for cryptosystems over $GF(2^{m})$

An automatic hardware generator for special arithmetic functions using various ROM-based approximation approaches

A high performance floating-point special function unit using constrained piecewise quadratic approximation

Novel VLSI implementation of Peano-Hilbert curve address generator

The efficient VLSI design of BI-CUBIC convolution interpolation for digital image processing

A novel CAVLC architecture for H.264 Video encoding at high bit-rate

Analysis of video filtering on the cell processor

Efficient intra-4×4 mode decision based on bit-rate estimation in H.264/AVC

Bit-depth expansion by adaptive filter

Automated conversion of Simulink designs to analog hardware on an FPAA

A novel approach for automated model generation

Accurate and reusable macromodeling technique using a fuzzy-logic approach

Reducing the effects of component mismatch by using relative size information

Capacitance ratio approximation in SC filters via genetic algorithm

VLSI decoding architecture with improved convergence speed and reduced decoding latency for irregular LDPC codes in WiMAX

Enhanced delta-based layered decoding of WiMAX QC-LDPC codes

Switching activity reducing layered decoding algorithm for LDPC codes

A dual-core programmable decoder for LDPC convolutional codes

Adaptive quantization in min-sum based irregular LDPC decoder

State discontinuity analysis of linear switched systems via energy function optimization

Injection locking conditions under small periodic excitations

Linear probability feedback processes

A comparative study of the new LQ-MCS control on an automotive electro-mechanical system

Stability analysis and control of bifurcations of parallel connected DC/DC converters using the monodromy matrix

Digitally enhanced analog circuits: System aspects

Performance enhancement of linear power amplifier employing digital technique

Mitigation of CMOS device variability in the transmitter amplitude path using Digital RF Processing

Mixed-domain system representation using Volterra series

A new orthogonal online digital calibration for time-interleaved analog-to-digital converters

A Dual-Vt low leakage SRAM array robust to process variations

A portless SRAM Cell using stunted wordline drivers

Presetting pulse-based flip-flop

High speed digital CMOS divide-by-N fequency divider

A design methodology for logic paths tolerant to local intra-die variations

An experimental study on multi-island structures for single-electron tunneling based threshold logic

Limits to a correct operation in RTD-based ternary inverters

An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on belief propagation

Power-saving nano-scale DRAMs with an adaptive refreshing clock generator

Microstrip stepped impedance lowpass filters based on the maxwell-wagner polarization mechanism

Early detection of all-zero block in H.264 with new rate-quantization models

A fast adaptive quantization matrix selection method in H.264/AVC

A model parameter and MAD prediction scheme for h.264 macroblock layer rate control

Avoiding unnecessary frame memory access and multi-frame motion estimation computation in H.264/AVC

Complexity and memory efficient GOP structures supporting VCR functionalities in H.264/AVC

Does the brain really outperform Rent’s rule?

LVDS interface for AER links with burst mode operation capability

A serial communication infrastructure for multi-chip address event systems

Fully digital AER convolution chip for vision processing

A CMOS high IIP2 mixer for multi-standard receivers

An ultra low power UHF RFID tag front-end for EPCglobal Gen2 with novel clock-free decoder

3.1-to-7GHz UWB impulse radio transceiver front-end based on statistical correlation technique

An open-source-input, ultra-wideband LNA with mixed-voltage ESD protection for full-band (170-to-1700 MHz) mobile TV tuners

A UWB CMOS 0.13μm low-noise amplifier with dual loop negative feedback

Switching activity estimation for shift-and-add based constant multipliers

High-speed modular multiplication design for public-key cryptosystems

Performance analysis of flagged prefix adders with logical effort

A novel decimal-to-decimal logarithmic converter

Low-power logarithmic number system addition/subtraction and their impact on digital filters

Selective enhancement of space-time broadband spiral-waves using 2D IIR digital filters

Efficient design of delta operator based 2-D IIR filters using symmetrical decomposition

Video coding with pixel-aligned directional adaptive interpolation filters

Image deringing using quadtree based block-shift filtering

Statistical detector for wavelet-based image watermarking using modified GH PDF

Parameter variation analysis for voltage controlled oscillators in phase-locked loops

Oscillation-based DFT for second-order OTA-C filters

Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm

Design methodology for CMOS distributed amplifiers

A methodology for efficient design of analog circuits using an automated simulation based synthesis tool

Low-power traceback MAP decoding for double-binary convolutional turbo decoder

Energy-efficient soft-output trellis decoder design using trellis quasi-reduction and importance-aware clock skew scheduling

Analog decoding of trellis coded modulation for multi-level flash memories

Current-mode memory cell with power down phase for discrete time analog iterative decoders

Multi-mode message passing switch networks applied for QC-LDPC decoder

Synchronization of first-order time-delay systems generating n-scroll chaotic attractors

An efficient and accurate method for computing the invariant measure of piecewise affine chaotic maps

Rigorous study of short periodic orbits for the Lorenz system

Multi-wing butterfly attractors from the modified Lorenz systems

Formulation and analysis of high-dimensional chaotic maps

Advanced IC technology - opportunities and challenges

Interconnect design and limitations in nanoscale technologies

Electrical modeling and characterization of 3-D vias

Work-function engineering for reduced power and higher integration density: An alternative to sizing for stability in FinFET memory circuits

Performance analysis of optimized carbon nanotube interconnect

ROM based logic (RBL) design: High-performance and low-power adders

Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4:2:2 H.264/AVC encoder LSI

A low-voltage latch-adder based tree multiplier

Programmable LSB-first and MSB-first modular multipliers for ECC in $GF(2^{m})$

Data reuse analysis of local stereo matching

Semi-implicit integration method for the time-domain simulation of thermal responses

2xVDD-tolerant crystal oscillator circuit realized with 1xVDD CMOS devices without gate-oxide reliability issue

Design of self-powered wireless system-on-a-chip sensor nodes for hostile environments

Device degradation and resilient computing

Adaptive error control for reliable systems-on-chip

Hardware-oriented image inpainting for perceptual I-frame error concealment

Realizing high throughput transforms of H.264/AVC

VLSI friendly computation reduction scheme in H.264/AVC motion estimation

A sub 100 mW H.264/AVC MP@L4.1 integer-pel motion estimation processor VLSI for MBAFF encoding

A reconfigurable video embedding transcoder based on H.264/AVC: Design tradeoffs and analysis

A digital circuit design of hyperbolic tangent sigmoid function for neural networks

Analog VLSI implementation of support vector machine learning and classification

SOM with False-Neighbor degree and its behaviors

Reservoir optimization in recurrent neural networks using kronecker kernels

A neurofuzzy selfmade network with output dependable on a single parameter

Foundational-circuit-based spice simulation

Synthesis of RF CMOS Low Noise Amplifiers

Accurate statistical analysis of a differential low noise amplifier using a combined SPICE-field solver approach

Analytical modeling of common-gate low noise amplifiers

Analog design retargeting by design knowledge reuse and circuit synthesis

1-V continuously tunable CMOS bulk-driven transconductor for Gm-C filters

A CMOS 750MHz fifth-order continuous-time linear phase lowpass filter with gain boost

An inverse filter realisation of a single scale Inverse continuous wavelet transform

A floating-gate transistor based continuous-time analog adaptive filter

A CMOS linear tunable transconductor for continuous-time tunable Gm-C filters

An IIP2 calibration technique for CMOS multi-standard mixers

Multi-band combined LNA and mixer

A reconfigurable A/D converter for 4G wireless systems

AMBA AHB bus potocol checker with efficient debugging mechanism

A low complexity complex QR factorization design for signal detection in MIMO OFDM systems

A novel approach for K-best MIMO detection and its VLSI implementation

Scalable VLSI architecture for K-best lattice decoders

FPGA implementation of a factorization processor for soft-decision reed-solomon decoding

Analysis of CORDIC-based triangularization for MIMO MMSE filtering

Dual-mode RNS based programmable decimation filter for WCDMA and WLANa

Optimal frame synchronization for DVB-S2

A high-speed four-parallel $radix-2^{4}$ FFT/IFFT processor for UWB applications

A low-power V-band CMOS low-noise amplifier using current-sharing technique

Bandwidth extension for ultra-wideband CMOS low-noise amplifiers

A single-chip UMTS receiver with integrated digital frontend in 0.13 μm CMOS

A low-power RF front-end for 2.5 GHz receivers

A 24GHz low-power CMOS receiver design

Design of Class-E power VCO in 65nm CMOS technology: Application to RF transmitter architecture

A 6–11GHz multi-phase VCO design with active inductors

A quadrature oscillator using simplified phase and amplitude calibration

A 0.5-V 3.6/5.2 GHz CMOS multi-band LC VCO for ultra low-voltage wireless applications

A low-phase-noise LC QVCO with bottom-series coupling and capacitor tapping

“Time borrowing” technique for design of low-power high-speed multi-modulus prescaler in frequency synthesizer

Protocol-level performance analysis for anti-collision protocols in RFID systems

Two bit-level pipelined viterbi decoder for high-performance UWB applications

A novel digitally controlled low noise ring oscillator

A new packet detection algorithm for IEEE 802.15.4a DBO-CSS in AWGN channel

Video decoder embedded with temporal LMMSE denoising filter

Image sensor with focal plane polarization sensitivity

Self-timed vertacolor dichromatic vision sensor for low power pattern detection

Steering with an aVLSI motion detection chip

A micro-power asynchronous contrast-based vision sensor wakes-up on motion

AER-based robotic closed-loop control system

Configuring silicon neural networks using genetic algorithms

A bio-inspired closed-loop insulin delivery based on the silicon pancreatic beta-cell

Image convolution using a probabilistic mapper on USB-AER board

Real time signal reconstruction from spikes on a digital signal processor

A 1.2mW CMOS temporal-difference image sensor for sensor networks

A novel refractometer architecture

High throughput quantification system for egg populations in caenorhabditis elegans

Neuromorphic implementation of active gaze and vergence control

A handheld fluorometer for measuring cellular metabolism

High-speed adaptive RF phased array

Distraction-related EEG dynamics in virtual reality driving simulation

Finite element modeling of tissue for optimal ultrasonic transducer array design

Calibration and characterization of self-powered floating-gate sensor arrays for long-term fatigue monitoring

A Low noise CMOS image sensor with an emission filter for fluorescence applications

Low-power differential photoplethysmographic pulse transit time detector for ambulatory cardiovascular monitoring

System for thermal measurement of pulse-transit-time

Application of implantable wireless biomicrosystem for monitoring electrode-nerve impedance of animal after sciatic nerve injury

Analogue/digital interface and communications aspects in a multi-channel ENG recording asic

Design of second order digital differentiator using Richardson extrapolation and fractional delay

Gramian-preserving frequency transformation for linear discrete-time systems using normalized lattice structure

Robust analytical design of equiripple comb FIR filters

IIR digital filter design via orthogonal projection of singular perturbational model reduction

Adaptive channel equalization: A simplified approach using the quantized-LMF algorithm

Special Fault Tolerant properties of FFT-based transform domain Adaptive Filters

A new structure for sound reproduction system

Tracking analysis of an adaptive IIR notch filter using gradient-based algorithm

High resolution 2-D DOA estimation using second-order partial-differential of MUSIC spectrum

Design of fractional delay FIR filter using discrete Fourier transform interpolation method

Discrete fractional Fourier transform based on the eigenvectors of Grünbaum tridiagonal matrix

Novel DCT-based real-valued discrete Gabor transform

Fast operators for arbitrary warping maps

Kalman filter for robust noise suppression in white and colored noises

A novel algorithm for mobile station location estimation with none line of sight error using robust least M-estimation

Model order selection for estimation of Common Acoustical Poles

A novel technique for the design and DCGA optimization of bilinear-LDI lattice-based digital IF filters

Compass tilt compensation algorithm using CORDIC

CHStone: A benchmark program suite for practical C-based high-level synthesis

Variability-aware design of subthreshold devices

Timing-driven obstacles-avoiding routing tree construction for a multiple-layer system

Thermal aware clock synthesis considering stochastic variation and correlations

Sigma delta ADC with a dynamic reference for accurate temperature and voltage sensing

Enhanced multi-bit delta-sigma modulator with two-step pipeline quantizer

Multi-loop efficient sturdy MASH delta-sigma modulators

A Wide-band 2-path cross-coupled sigma delta ADC

Design of hybrid continuous-time discrete-time delta-sigma modulators

Task partitioning algorithm for intra-task dynamic voltage scaling

Robust wide range of supply-voltage operation using continuous adaptive size-ratio gates

Dynamic voltage and frequency scaling circuits with two supply voltages

Power optimization of weighted bit-product summation tree for elementary function generator

FSMD partitioning for low power using simulated annealing

Reconfigurable two-dimensional pipeline FFT processor in OFDM cognitive radio systems

A real-time systolic array processor implementation of two-dimensional IIR filters for radio-frequency smart antenna applications

A low-complexity high-performance noncoherent receiver for GFSK signals

Benefit of linearizing power amplifiers in multi-port amplifier subsystems

A simultaneous TX and RX I/Q imbalance calibration method

Analytical solutions of the Class D inverter

Improved harmonic analysis of RC-active phase shift oscillators

A varactorless technique for tuning LC oscillators based on loop gain adjustment

Efficient model reduction of passive electrical networks with a large number of independent sources

Invariant sums of higher order sensitivities

Digital calibration of gain and linearity in a CMOS RF mixer

ESD protection design for fully integrated CMOS RF power amplifiers with waffle-structured SCR

Integrated balun design for dual-band WLAN a/b/g applications

Design of broadband inductorless LNAs in ultra-scaled CMOS technologies

A new WiMAX sigma-delta modulator with constant-Q active inductors

Steady-state analysis of strongly nonlinear Oscillators By Means of Runge-Kutta Methods

An efficient approach to model distortion in weakly nonlinear Gm - C filters

The effect of parameter mismatches in RF VCO

Study of zero-order holder discretization in single input sliding mode control systems

Modeling and simulation of micro electromechanical (MEM) beam resonator-based oscillators

Approximate L0 constrained non-negative matrix and tensor factorization

Non-negative matrix factorization in bioinformatics: Towards understanding biological processes

Group learning using contrast NMF : Application to functional and structural MRI of schizophrenia

Geometric structure of sum-of-rank-1 decompositions for n-dimensional order-p symmetric tensors

Algorithm for imposing SOBI-type constraints on the CP model

HAFT: A hybrid FPGA with amorphous and fault-tolerant architecture

Finding minimum interconnect sub-arrays in reconfigurable VLSI arrays

An efficient greedy approach to PLA folding

VLSI implementation of a shift-enabled reconfigurable array

An asynchronous spike event coding scheme for programmable analog arrays

A study on global robust stability of delayed full-range cellular neural networks

Waves and patterns in delayed oscillatory networks

A nonseparable 3D spatiotemporal bandpass filter with analog networks

Spiral waves in bio-inspired oscillatory media

Robust analog neural network based on continuous valued number system

A self-adapting high dynamic-range visual representation algorithm for AER imagers

Signal-adapted directional lifting scheme for image compression

3-D direction aligned wavelet transform for scalable video coding

Multi-view depth video coding using depth view synthesis

Bidirectionally decodable Wyner-Ziv video coding

Low-power “Smart” CMOS image sensors

Low power image sensor with polymer polarization filters

Phototransistor image sensor in silicon on sapphire

A 256×256 separable transform CMOS imager

A Sub-μW fully programmable CMOS DPS for uncooled infrared fast imaging

Continuous-time ΔΣ modulators with noise-transfer-function enhancement

A new optimization approach for the automatic design of ΣΔ-modulators

Multibit incremental data converters with reduced sensitivity to mismatch

Efficient fully-floating double-sampling integrator for ΔΣ ADCs

Digital jitter-cancellation for narrowband signals

Active self supplied AC-DC converter for piezoelectric energy scavenging systems with supply independent bias

Low power and robust 7T dual-Vt SRAM circuit

60μW SMR BAW oscillator designed in 65nm CMOS technology

A low-area, low-power programmable frequency multiplier for DLL based clock synthesizers

High-performance low-power AND and Sense-Amp address decoders with selective precharging

Optimization techniques of AAC decoder on PACDSP VLIW processor

Complexity-effective auditory compensation for digital hearing aids

Parallelism to reduce power consumption on FPGA spatiotemporal image processing

On the feasibility of hardware implementation of sub-Nyquist random-sampling based analog-to-information conversion

Efficient residue arithmetic based parallel fixed coefficient FIR filters

Delta discrete-time operator based realization procedure for low sensitivity sampled-data and digital ladder filters

Design of highly linear multipliers using floating gate transistors and/or source degeneration resistor

On-chip RC measurement and calibration circuit using Wheatstone bridge

Direct-form SC filters with low frequency response sensitivity to the transfer function coefficients

A fast compact CMOS feedforward automatic gain control circuit

Impulse based scheme for crystal-less ULP radios

Efficient spacing scheme for a linearly interpolated lookup table predistorter

A tool for the fast distortion evaluation of non linear amplifiers in broadband transmission systems

Efficient coarse frequency synchronizer using serial correlator for DVB-S2

Design and implementation of a fully reconfigurable chipless RFID tag using Inkjet printing technology

Predictive control algorithm for phase-locked loops

A phase-frequency detector and a charge pump design for PLL applications

An alias-locked loop frequency synthesis architecture

Modeling and simulation of PLL-based frequency-synthesizers for FMCW radar

Phase jitter dynamics of first-order digital phase-locked loops with frequency-modulated input

A CMOS image sensor with spiking pixels for retinal stimulation

A programmable ENG amplifier with passive EMG neutralization for FES applications

A wideband PWM-FSK receiver for wireless implantable neural recording applications

Low-power IC design for a wireless BCI system

Adjusting the neurons models in neuromimetic ICs using the voltage-clamp technique

Innovative power gating for leakage reduction

Analysis and performance evaluation of area-efficient true random bit generators on FPGAs

Utilizing synthesis to verify Boolean function models

Multi-clock pipeline structure for 802.11 a WLAN transceiver

Compact designs of mixcolumns and subbytes using a novel common subexpression elimination algorithm

Implementation of a CNN-based perceptual framework on a roving robot

ASPA: Focal Plane digital processor array with asynchronous processing capabilities

Pixel parallel vessel tree extraction for a personal authentication system

Focal-plane moving object segmentation for realtime video surveillance

Centroiding and classification of objects using a processor array with a scalable region of interest

Super resolution of video using key frames

A rate and distortion analysis for H.264/AVC video coding

Complexity modeling of H.264/AVC CAVLC/UVLC entropy decoders

L-shaped segmentations in motion-compensated prediction of H.264

Adaptive downsampling/upsampling for better video compression at low bit rate

A hybrid CMOS APS pixel for wide-dynamic range imaging applications

A novel DPS integrator for fast CMOS imagers

Predictive coding on-sensor compression

An analog self-similitude edge-filtering processor for multiple-resolution image perception

A 64×64 pixel temporal contrast microbolometer infrared sensor

A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter

A subsampling bandpass ΣΔ modulator with lumped and distributed resonators

Band-pass ΣΔ architectures with single and two parallel paths

An ultra low-voltage multibit delta-sigma modulator for audio-band application

Digitally-enhanced 2nd-order ΔΣ modulator with unity-gain signal transfer function

A low power, process invariant keeper for high speed dynamic logic circuits

A low power 90-nm CMOS motion estimation processor implementing dynamic voltage and frequency scaling (DVFS) and fast motion estimation algorithm

A novel hardware acceleration scheme for java method calls

Address compression for scalable load/store queue implementation

Fault tolerant bit parallel finite field multipliers using LDPC codes

Fast and memory efficient VLSI architecture for output probability computations of HMM-based recognition systems

Pulse width and position modulation for fully digital audio amplifier

Direction of arrival estimation for speech sources using fourth order cross cumulants

Speech enhancement based on adaptive wavelet denoising on multitaper spectrum

A spectro-temporal algorithm for pitch frequency estimation from noisy observations

An adjustable CMOS floating resistor

Comparison of programmable linear resistors based on quasi-floating gate MOSFETs

“The flipped voltage follower”-based low voltage fully differential CMOS sample-and-hold circuit

A simple modeling of the early voltage of MOSFETs in weak and moderate inversion

The low-power and low-area PWM by light intensity for photoflash in 0.35-μm CMOS

A 2.4-GHz fractional-N PLL with a PFD/CP linearization and an improved CP circuit

A 6.8GHz low-power and low-phase-noise phase-locked loop design

A high-speed variable phase accumulator for an ADPLL architecture

Inter-signal timing skew compensation of parallel links with voltage-mode incremental signaling

The effect of noise propagation on phase noise in ring oscillators

Wireless neural signal acquisition with single low-power integrated circuit

HermesC: RF wireless low-power neural recording system for freely behaving primates

A clockless ultra low-noise low-power wireless implantable neural recording system

A 4-channel wearable wireless neural recording system

Dual band LNA/mixer using conjugate matching for implantable biotelemetry

Self-tuned regenerative amplification and the hopf bifurcation

A 2-D silicon cochlea with an improved automatic quality factor control-loop

Compact calibration circuit for large neuromorphic arrays

Noise model, analysis and characterization of a differential active pixel sensor

Integrated circuit implementation of a cortical neuron

Modeling dynamic stability of SRAMS in the presence of single event upsets (SEUs)

Glitch-aware output switching activity from word-level statistics

Arithmetic module generator with algorithm optimization capability

ILP-based optimization of time-multiplexed I/O assignment for multi-FPGA systems

Timing-driven X-architecture router among rectangular obstacles

An integrated patch-clamp amplifier for high-throughput planar patch-clamp systems

MEMS acoustic sensors for totally implantable hearing aid systems

System-on-chip ultrasonic transducer for dental tissue formation and stem cell growth and differentiation

Ultra-high ratio dilution microfluidic system for single strand DNA isolation

Computer aided simulation and verification of forward error-correcting biosensors

A multiple description image/video coding method by compressed sensing theory

Effective congestion and error control for scalable video coding extension of the H.264/AVC

Optimal rate allocation for scalable video multicast over WiMAX

Software implementation of Chien search process for strong BCH codes

Structured LDPC codes with low error floor based on PEG tanner graphs

Current-mode image sensor with 1.5 transistors per pixel and improved dynamic range

Back-illuminated ultraviolet image sensor in silicon-on-sapphire

CMOS image sensor readout employing in-pixel transistor current sensing

Image sensor with focal plane change event driven video compression

A low-power CMOS front end for particle detection applications

A simple technique to reduce clock jitter effects in continuous-time delta-sigma modulators

Analysis of digital gain error compensation in continuous-time cascaded sigma-delta modulators

Continuous-time feed-forward ΣΔ- modulators with robust signal transfer function

On low power design of feedforward continuous-time sigma delta modulators with excess loop delay

Fixed-step simulation of Continuous-Time ΣΔ modulators

Design of error-tolerant cache memory for multithreaded computing

Dynamic wordline voltage swing for low leakage and stable static memory banks

Spin-transfer torque magnetoresistive content addressable memory (CAM) cell structure design with enhanced search noise margin

PVT-invariant single-to-differential data converter with minimum skew and duty-ratio distortion

A novel 4T asymmetric single-ended SRAM cell in sub-32 nm double gate technology

An efficient finite precision realization of the block adaptive decision feedback equalizer

Bit-level optimized FIR filter architectures for high-speed decimation applications

Prediction of protein-coding regions in DNA sequences using a model-based approach

An area-efficient sampling rate converter using negative feedback technique

Thermo-visual video fusion using probabilistic graphical model for human tracking

A programmable dual hysteretic window comparator

A simple and accurate method to predict offset voltage in dynamic comparators

Adjustable hysteresis CMOS Schmitt triggers

Low-current consumption CMOS comparator using charge-storage amplifier for A/D converters

Low-power static and dynamic high-voltage CMOS level-shifter circuits

700MHz RF transceiver of base station for 802.16e

A 200Mbps 0.02nJ/b dual-mode inductive coupling transceiver for cm-range interconnection

0.18um CMOS integrated chipset for 5.8GHz DSRC systems with +10dBm output power

A charge pump-based direct frequency modulator

Design space exploration of low-phase-noise LC-VCO using multiple-divide technique

An implantable I-UWB transceiver architecture with power carrier synchronization

A low-power silicon-on-sapphire tunable ultra-wideband transmitter

A reconfigurable IC for wireless monitoring of chemical or electrical neural activity

Tracking tongue movements for environment control using particle swarm optimization

A brain-machine interface using dry-contact, low-noise EEG sensors

Chemical and biological sensors for environmental monitoring

A mobile environmental sensing system to manage transportation and urban air quality

Genetically-engineered whole-cell bioreporters on integrated circuits for environmental monitoring

Baseline resistance cancellation circuit for high resolution thiolate-monolayer-protected gold nanoparticle vapor sensor arrays

A multiplexed biosensor based on biomolecular nanowires

Cost-effective and low-power memory address bus encodings

Logic synthesis method for FPGAs with embedded memory blocks

Concurrent skew and control step assignments in RT-level datapath synthesis

Area oriented pass-transistor logic synthesis using buffer elimination and layout compaction

Co-evolutionary reliability-oriented high-level synthesis

Seizure detection on prolonged-EEG videos

A variable control system for wireless body sensor network

Analog CMOS charge model for molecular redox electron-transfer reactions and bio-chemical pathways

Data scaling in remote health monitoring systems

State estimation for a model of gene expression

A multi-hypothesis decoder for multiple description video coding

Probabilistic prefetching scheme for P2P VoD applications with frequent seeks

An optimized link adaptation scheme for efficient delivery of scalable H.264 Video over IEEE 802.11n

Robust video multicast with joint network coding and AL-FEC

A hierarchical push-pull scheme for peer-to-peer live streaming

A cluster-based computing infrastructure for wide-area multi-modal surveillance networks

A sensor placement algorithm for redundant covering based on Riesz energy minimization

An adaptive ISFET chemical imager chip

A 0.35µm 1.25V piezo-resistance digital ROIC for liquid dispensing MEMS

MEMS automotive collision avoidence radar beamformer

Design of reliable interface system for eddy current displacement sensors in vacuum environments1

A low noise CMOS preamplifier for femtoampere current detection

A low power CMOS sigma-delta readout circuit for heterogeneously integrated chemoresistive micro-/nano- sensor arrays

Low voltage, low power, compact, high accuracy, high precision PTAT temperature sensor for deep sub-micron CMOS systems

A piezoelectric actuator driver circuit for automatic focusing of mobile phone cameras

Binaural spectral cues for ultrasonic localization

Optimum camera placement considering camera specification for security monitoring

Position, damping and inertia control of parallel-plate electrostatic actuators

A wireless sensing platform for battery-free sensors

A Time Domain differential CMOS Temperature Sensor with Reduced Supply Sensitivity

An asynchronous time-based image sensor

A CMOS image sensor with focal plane SPIHT image compression

Autonomous CMOS image sensor for real time target detection and tracking

Low power linear current mode imager with 1.5 transistors per pixel

Two color asynchronous event photo pixel

High-speed character recognition system based on a complex hierarchical AER architecture

Temporally learning floating-gate VLSI synapses

A novel CMOS current mode fully differential tanh (x) implementation

Implementing a neuromorphic cross-correlation engine with silicon neurons

Stability analysis for impulsive neural networks with variable delays

An averaging method for a committee of special-orthogonal-group machines

CMOS pulse-modulation circuit implementation of phase-locked loop neural networks

An E-nose haar wavelet preprocessing circuit for spiking neural network classification

Adaptive delay compensation in multi-dithering adaptive control

Delta-sigma modulated class D ZCS series resonant inverter with an inductive load

Design of class DE amplifier with nonlinear shunt capacitances for any output Q

A novel current controlled tri-state boost converter with superior dynamic performance

Low-OSR asynchronous Σ-Δ modulation high-order buck converter for efficient wideband switching amplification

LED drivers with PPD compensation for achieving fast transient response

A quasi fixed frequency constant on time controlled boost converter

An asynchronous finite state machine controller for integrated buck-boost power converters in wideband signal-tracking applications

Zero current detection technique for fast transient response in buck DC-DC converters

Integrated single-inductor dual-input dual-output boost converter for energy harvesting applications

Review of digital control laws for high-frequency point-of-load converters

An offset compensation technique for bandgap voltage reference in CMOS technology

Temperature performance of sub-1V ultra-low power current sources

A 1V power supply operation CMOS subbandgap reference using switched capacitors

A current limiter for LDO regulators with internal compensation for process and temperature variations

A high precision, output-capacitor-free low-dropout regulator for system-on-chip design

A parallel sampling scheme for ultra-wideband signal based on the random projection

A novel flash analog-to-digital converter

An M-2M digital-to-analog converter design methodology based on a physical mismatch model

Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback

Design of a 6 bit 1.25 GS/s DAC for WPAN

A CMOS 2.0–11.2 GHz UWB LNA using active inductor circuit

A novel topology in reversed nested miller compensation using dual-active capacitance

A low-voltage low-power fully differential rail-to-rail input/output opamp in 65-nm CMOS

Efficient four-stage frequency compensation for low-voltage amplifiers

A gain-enhancing technique for very low-voltage amplifiers

Diagnosis of assembly failures for System-in-Package RF tuners

Low-power short-channel single-ended current-steered CMOS logic-gate for mixed-signal systems

Mixed-signal flexible architecture for the synthesis of n-port networks

A metastability-independent time-to-voltage converter

A process- and temperature-tolerant power-on reset circuit with a flexible detection level higher than the bandgap voltage

An improved method of power control with CMOS class-E power amplifiers

Programmable voltage-to-current converter with linear voltage control resistor

A highly accurate BiCMOS cascode current mirror for wide output voltage range

A 1.5V, wide-input range, high-bandwidth, CMOS four-quadrant analog multiplier

Synchronization of two LC- oscillators using capacitive coupling

Power and area efficient circular-memory switched-capacitor FIR baseband filter for WCDMA/GSM

10GBase-LX4 optical fiber receiver in a 0.18μm digital CMOS process

Exponential-enhanced characteristic of MOS transistors and its application to log-domain circuits

Nyquist-rate analog-to-digital converter specification for Zero-IF UMTS receiver

Anticipatory access pipeline design for phased cache

An Analytical model for characteristic impedance in nanostrip plasmonic waveguides

A novel contribution to the RTD-based threshold logic family

Integration time optimization for integrating photosensors

A 0.18-μm CMOS clock and data recovery circuit with reference-less dual loops

Low-power 50% duty cycle corrector

An inductively tuned CMOS astable multivibrator

Implementation of compact VLSI FitzHugh-Nagumo neurons

A CMOS realization of double-scroll chaotic circuit and its application to random number generation

Digital filtering for power amplifiers linearization

Long-term jitter reduction through supply noise compensation

Distortion calculation of an asynchronous switching xDSL line-driver

A novel multiscroll chaotic system and its realization

Investigation of state transition phenomena in cross-coupled chaotic circuits

Methods to eliminate dynamic errors in high-performance SAR A/D converter

System identification -based reduced-code testing for pipeline ADCs’ linearity test

A fully digital ADC using a new delay element with enhanced linearity

Jitter error spectrum for NRZ D/A converters

Hybrid modeling techniques for low OSR cascade continuous-time ΣΔ modulators

Power-supply-variation-aware timing analysis of synchronous systems

Equivalent rise time for resonance in power/ground noise estimation

Analysis of the impacts of signal rise/fall time and skew variations in coupled-RLC interconnects

Delay macromodeling and estimation for RTL

Time diversity approach for intra-chip RF/wireless interconnect systems

Complexity reduction for frequency-response masking filters using serial masking

Design of frequency-response-masking FIR filters using SOCP with coefficient sensitivity constraint

Subexpression encoded extrapolated impulse response FIR filter with perfect residual compensation

Hilbert transformers with a piecewise-polynomial-sinusoidal impulse response

Minimax IIR digital filter design using SOCP

CMOS ASIC for MHz silicon BAW gyroscope

An integrated design for the front-end of an inductive position sensor

The design of a chopped current-feedback instrumentation amplifier

Dual op amp, LDO regulator with power supply gain suppression for CMOS smart sensors and microsystems

A micropower front-end interface for differential-capacitive sensor systems

Frequency offset compensation for OFDM receiver using rotating concyclic antenna

IQ imbalance and phase noise mitigation for wireless OFDM systems

A complete pipelined MMSE detection architecture in a 4x4 MIMO-OFDM receiver

Tracking loop for IR-UWB communications in IEEE 802.15 multi-path channels

Real-time FPGA-based implementation of digital instantaneous frequency measurement receiver

A novel safety system concept and implementation for implantable stimulators: A universal DC tissue leakage current detector

A high-output-impedance current microstimulator for anatomical rewiring of cortical circuitry

A partial-current-steering biphasic stimulation driver for neural prostheses

Extended counting ADC for 32-channel neural recording headstage for small animals

A back telemetry-capable active high efficiency rectifier in standard CMOS process

A brief overview of some recent advances in complex dynamical networks control and synchronization

Reducing synchronization cost in weighted dynamical networks using betweenness centrality measures

Vertex-based adaptive synchronization of complex networks

Localization of effective pinning control in complex networks of dynamical systems

The emergence of stable cooperators in heterogeneous networked systems

Phase noise in frequency divider circuits

ATLAS: An adaptively formed hierarchical cell library based analog synthesis framework

Post-optimization of Delta-Sigma modulators considering circuit non-idealities

A multi-step P-cell for LNA design automation

Jitter simulation and measurement of an all-digital clock generator with dynamic frequency counting loop

Low-voltage circuit design for widespread sensing applications

Ultra-low-power UWB for sensor network applications

System design considerations for sensor network applications

An energy-adaptive MPPT power management unit for micro-power vibration energy harvesting

Circuit techniques for ultra-low power subthreshold SRAMs

Architectural analyses of K-Means silicon intellectual property for image segmentation

A sparse representation of physical activity video in the study of obesity

An efficient embedded compression algorithm using adjusted binary code method

Graph cut video object segmentation using histogram of oriented gradients

A high-quality spatial-temporal content-adaptive deinterlacing algorithm

High-bandwidth floating gate CMOS rectifiers with reduced voltage drop

A current mode adaptive on-time control scheme for fast transient DC-DC converters

Inductor-current zero-crossing detection mixed-signal CMOS circuit for a DCM-operated 3-level switching power converter

An integrated reconfigurable switched-capacitor DC-DC converter with a dual-loop adaptive gain-pulse control

Adaptive step-size digital controller for switching frequency auto-tuning

Active compensation of supply noise for a 5-GHz VCO in 45-nm CMOS SOI technology

A reconfigurable direct RF receiver architecture

Fast frequency acquisition all-digital PLL using PVT calibration

A programmable 25 MHz to 6 GHz rational-K/L frequency synthesizer with digital Kvco compensation

A buffered charge pump with zero charge sharing

Don’t care filling for power minimization in VLSI circuit testing

Design and analysis of skewed-distribution scan chain partition for improved test data compression

Intellectual property authentication by watermarking scan chain in design-for-testability flow

High performance data acquisition system for IRFPA testing

A fault-aware dynamic routing algorithm for on-chip networks

Generalized structure for designing odd-order variable fractional-delay filters

Design of discrete Fractional Hilbert transformer in time domain

The design of asymmetrical square-root pulse-shaping filters with wide eye-openings

Digital filter realizations absent of self-sustained oscillations

Improved hot-spot location technique for proteins using a bandpass notch digital filter

A capacitor-less low-dropout regulator for SoC with bi-directional asymmetric buffer

Low-voltage LDO Compensation Strategy based on Current Amplifiers

A low-voltage CMOS low-dropout regulator with novel capacitor-multiplier frequency compensation

High linear voltage references for on-chip CMOS smart temperature sensor from −60°C to 140°C

A low voltage CMOS bandgap reference circuit

A low-power mixing DAC IR-UWB-receiver

Design of UWB LNA in 45nm CMOS technology: Planar bulk vs. FinFET

An energy-detector for non-coherent impulse-radio UWB receivers

The design of integrated 3-GHz to 11-GHz CMOS transmitter for full-band ultra-wideband (UWB) applications

A CMOS variable width short-pulse generator circuit for UWB RADAR applications

Front-end amplifier of low-noise and tunable BW/gain for portable biomedical signal acquisition

A 0.65V rail-to-rail constant gm opamp for biomedical applications

A 1-V 1.1-μW sensor interface IC for wearable biomedical devices

A DC coupled signal acquisition system with ultra-wide input range

An ultra low-power CMOS action potential detector

Human activity recognition for video surveillance

An experimental study on pedestrian classification using local features

A framework of spatio-temporal analysis for video surveillance

Multi-strategy object tracking in complex situation for video surveillance

A region-based object tracking scheme using Adaboost-based feature selection

Transient simulation of on-chip transmission lines via exact pole extraction

On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits

3-D thermal simulation with dynamic power profiles

Leakage power optimization for clock network using dual-Vth technology

Binning algorithm for accurate computer aided device modeling

Novel interconnect infrastructures for massive multicore chips — an overview

Performance comparison between copper, carbon nanotube, and optical interconnects

Non-traditional irregular interconnects for massive scale SoC

Photonic networks-on-chip: Opportunities and challenges

Improving the scalability of checkpoint recovery for networks-on-chip

System level design of a spatio-temporal video resampling architecture

High efficiency architecture of escot with pass concurrent context modeling scheme for scalable video coding

An efficient VLSI architecture for rate disdortion optimization in AVS video encoder

Performance evaluation of DCT and wavelet transform for LSI

A transform, lighting and setup ASIC for surface splatting

A new state estimation using synchronized phasor measurements

Oscillation monitoring from ambient PMU measurements by Frequency Domain Decomposition

A thermal equivalent circuit for PEM fuel cell temperature control design

Fast-scale period-doubling bifurcation in voltage-mode controlled full-bridge inverter

An interleaved class $E^{2}$ dc/dc converter

A 25MHz all-CMOS reference clock generator for XO-replacement in serial wire interfaces

A highly linear CMOS current-controlled oscillator using a novel frequency detector

Programmable spread spectrum clock generation based on successive phase selection technique

A noise-shaping SC sine-wave oscillator

7-decades tunable translinear SiGe BiCMOS 3-phase sinusoidal oscillator

A low-area interconnect architecture for chip multiprocessors

A 0.6pJ/b 3Gb/s/ch transceiver in 0.18 μm CMOS for 10mm on-chip interconnects

Explicit energy evaluation in RLC tree circuits with ramp inputs

Dynamic compact thermal model of a package

Modeling and simulation of complex heterogeneous systems

Local computation and estimation of wavelet coefficients in the dual-tree complex wavelet transform

A new structure of lifting wavelet for reducing rounding error

Statistical image modeling using von Mises distribution in the complex directional wavelet domain

On the probability density function of the derotated phase of complex wavelet coefficients

Introduction to the Discrete Shapelet Transform and a new paradigm: Joint time-frequency-shape analysis

A hexagonal Field Programmable Analog Array consisting of 55 digitally tunable OTAs

Design and realization of continuous-time wave digital filters

Harmonic vs. geometric mean Sinh integrators in weak inversion CMOS

A PVT independent subthreshold constant-Gm stage for very low frequency applications

Design procedure for DVB-T receivers large tuning range LP filter

ASIC hardware implementations for 512-bit hash function Whirlpool

Compact ASIC implementation of the ICEBERG block cipher with concurrent error detection

High-performance ASIC implementations of the 128-bit block cipher CLEFIA

Secure pseudo-random bit sequence generation using coupled linear congruential generators

Differential Power Analysis of a SHACAL-2 hardware implementation

Recursive Least Squares adaptive filters for ultrasonic signal deconvolution

Adaptive EMG neutralization using the modified QT

A low-distortion and wide dynamic range CMOS imager for wireless capsule endoscopy

New digital quadrature demodulator for real-time hand-held ultrasound medical imaging device

A real-time setup for multisite signal recording and processing in living neural networks

Multipurpose watermarking based on curvelet transform

Advanced colluder detection techniques for OSIFT-based hiding codes

Quality-aware GSM speech watermarking

Watermarking curves using 2D mesh spectral transform

An interactive and secure user authentication scheme for mobile devices

Stochastic model and simulation of a random number generator circuit

A fast band matching technique for impedance extraction

A novel approach to statistical simulation of ICS affected by non-linear variabilities

Process variations aware robust on-chip bus architecture synthesis for MPSoCs

Efficient linear macromodeling via least-squares response approximation

Sigma-delta learning for super-resolution independent component analysis

Fast blind equalization with two-stage single/multilevel modulus and DD algorithm for high order QAM cable systems

Local independent component analysis applied to highly segmented detectors

Multiple-target localization and estimation of MIMO radars with unknown transmitted signals

Signal modulus design for blind source separation via algebraic known modulus algorithm: A perturbation perspective

Automatic video diagnosing method using embedded crypto-watermarks

Joint optimization of data hiding and video compression

Data hiding in inter and intra prediction modes of H.264/AVC

JPEG image steganalysis utilizing both intrablock and interblock correlations

A wavelet-based semi-fragile watermarking with recovery mechanism

Accelerated state-variable modeling of synchronous machine-converter systems

Sectionalized PWM (S-PWM): A new multilevel modulation strategy

Current mode DC-DC buck converters with optimal fast-transient control

On the design of single-inductor multiple-output DC-DC buck converters

Automatic dead-time adjustment CMOS mixed-signal circuit for a DCM-operated 3-level switching power converter

An 8 Mbps data rate transmission by inductive link dedicated to implantable devices

Design of an active-inductor-based termination circuit for high-speed I/O

A passive filter aided timing recovery scheme

A 8-Gb/s/pin current mode multi-level simultaneous bidirectional I/O

Pulse-mode link for robust, high speed communications

Novel interpolation architecture for Low-Complexity Chase soft-decision decoding of Reed-Solomon codes

Symbol and carrier frequency offset synchronization for IEEE802.16e

A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13μm CMOS technology

A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes

CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control

Adaptive equalization for filter bank based multicarrier systems

A new blind-block reciprocal parametric transform

A lattice structure for linear-phase perfect reconstruction filter banks with mirror image symmetric frequency response

Oversampled linear-phase perfect reconstruction filter banks with higher-order feasible building blocks: Structure and parameterization

A farrow-structure-based multi-mode transmultiplexer

Linear-enhanced V to I converters based on MOS resistive source degeneration

Log-domain channel-select filters for multistandard wireless receivers

Power and area efficient high speed analog adaptive equalization

Current-mode filter in 65nm CMOS for a software-radio application

Active bandpass filter using transformer feedback in 0.18-μm CMOS for 802.11a wireless LAN

A high SFDR direct digital synthesizer with frequency error free output

Curse of digital polar transmission: Precise delay alignment in amplitude and phase modulation paths

Design and low-power implementation of an adaptive image rejection receiver

Cost-effective echo and NEXT canceller designs for 10GBASE-T ethernet system

Efficient FPGA implementation of complex multipliers using the logarithmic number system

An ultra-low-power micro-optoelectromechanical tilt sensor

Polarization analyzing CMOS sensor for microchamber/microfluidic system based on image sensor technology

The chemical current-conveyor: a new microchip biosensor

A novel hybrid active-passive pixel with correlated double sampling CMOS readout circuit for medical x-ray imaging

A mini-invasive multi-function bladder urine pressure measurement system

Turning liabilities into assets: Exploiting deep submicron CMOS technology to design secure embedded circuits

Utilizing sub-threshold technology for the creation of secure circuits

Brand and IP protection with physical unclonable functions

Asynchronous balanced gates tolerant to interconnect variability

Physical unclonable function with tristate buffers

A least-squares based method for IIR filtering with noisy input-output data

An algorithm for ARMA model parameter estimation from noisy observations

An efficient approach for designing filter banks for Multi-Carrier Transmission

Adaptive wavelet denoising system for speech enhancement

Robust adaptive beamformers with linear matrix inequality constraints

Missing feature speech recognition in a meeting situation with maximum SNR beamforming

Multimicrophone speech dereverberation using spatiotemporal and spectral processing

Blind speech dereverberation using batch and sequential Monte Carlo methods

A study of identifibility for blind source separation via non-orthogonal joint diagonalization

Footstep classification using simple speech recognition technique

Audio event classification using binary hierarchical classifiers with feature selection for healthcare applications

Face hallucination based on independent component analysis

Face clustering in videos using constraint propagation

Musical beat tracking via Kalman filtering and noisy measurements selection

Efficient music representation with content adaptive dictionaries

ZVS operating frequency versus duty ratio of class E amplifier with nonlinear shunt capacitance

Characterizing fast-scale instability in a buck-based switching amplifier for wideband tracking

Smooth transition and ripple reduction in 4-switch non-inverting buck-boost power converter for WCDMA RF power amplifier

Off-time prediction in digital constant on-time modulation for DC-DC converters

A 2.5MHz, 97%-accuracy on-chip current sensor with dynamically-biased shunt feedback for current-mode switching DC-DC converters

A high speed word level finite field multiplier using reordered normal basis

Enhanced power analysis attack using chosen message against RSA hardware implementations

Advanced Encryption Standard (AES) implementation with increased DPA resistance and low overhead

On the security of a class of image encryption schemes

Implementation of AES S-Boxes using combinational logic

A dual-field elliptic curve cryptographic processor based on a systolic arithmetic unit

A full-custom design of AES SubByte module with signal independent power consumption

Switching activity reduction in low power Booth multiplier

A 6.3nJ/op low energy 160-bit modulo-multiplier for elliptic curve cryptography processor

Differential Power Analysis resistant hardware implementation of the RSA cryptosystem

A low-power monolithically stacked 3D-TCAM

“Green” micro-architecture and circuit co-design for ternary content addressable memory

A dynamic address decode circuit for implementing range addressable look-up tables

High speed single-ended pseudo differential current sense amplifier for SRAM cell

A nano-CMOS process variation induced read failure tolerant SRAM cell

A power-aware 2-dimensional bypassing multiplier using cell-based design flow

A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop

A general model for differential power analysis attacks to static logic circuits

Programmable threshold voltage using quantum dot transistors for low-power mobile computing

A novel floating gate circuit family with subthreshold voltage swing for ultra-low power operation

A novel VLSI iterative divider architecture for fast quotient generation

Modified CSD group multiplier design for predetermined coefficient groups

New designs of Redundant-Binary full Adders and its applications

A variant of a radix-10 combinational multiplier

Reduced Z-datapath Cordic Rotator

A hybrid self-testing methodology of processor cores

PrSoC: Programmable System-on-chip (SoC) for silicon prototyping

Optimization technique for flip-flop inserted global interconnect

A real-time image denoising chip

Accurate analytical delay modeling of CMOS clock buffers considering power supply variations

A semi-custom memory design for an asynchronous 8051 microcontroller

De-synchronization of a point-of-sales digital-logic controller

A cost effective reconfigurable memory for multimedia multithreading streaming architecture

A synchronized variable frequency clock scheme in chip multiprocessors

Full waveform accuracy to estimate delay in coupled digital circuits

Optimization of active circuits for substrate noise suppression

Design of an all-digital variable length ring oscillator (VLRO) for clock synthesis

A reconfigurable MAC architecture implemented with mixed-Vt standard cell library

A data traffic efficient H.264 deblocking IP

ADAPTO: full-adder based reconfigurable architecture for bit level operations

Improving datapath utilization of programmable DSP with composite functional units

Bit-depth scalable coding based on macroblock level inter-layer prediction

Freeview rendering with trinocular camera

Side information generation with constrained relaxation for distributed multi-view video coding

Hyperspectral image coding with LVQ-SPECK

Wavelet based distributed video coding with spatial scalability

A 100MHz ASIP (application specific instruction processor) for CAVLC of H.264/AVC decoder

Enhanced temporal error concealment algorithm with edge-sensitive processing order

Frame loss error concealment for multiview video coding

Numerical error analysis for super-resolution reconstruction

ISID : In-order scan and indexed diffusion segmentation algorithm for stereo vision

Fast sub-pixel motion estimation and mode decision for H.264

Efficient all-zero block detection algorithm for H.264 integer transform

A novel fine rate control algorithm with adaptive rounding offset

Accelerating vector quantization of images using modified run length coding for adaptive block representation and difference measurement

Constant distortion rate control for H.264/AVC high definition videos with scene change

Fast selective-intra mode search algorithm based on macro-block tracking for inter-frames in the H.264/AVC video standard

Data Reuse method between Heterogeneous Partitions (DRHP) in H.264/AVC motion compensator

Performance evaluation of H.264 video over ad hoc networks based on dual mode IEEE 802.11B/G and EDCA MAC architecture

Overcoming burst packet loss in peer-to-peer live streaming systems

An SDRAM controller optimized for high definition video coding application

A baseball exploration system using spatial pattern recognition

Spatiotemporal projection of motion field sequence for generating feature vectors in gesture perception

Spatial-temporal consistent labeling for multi-camera multi-object surveillance systems

Clipping-ratio-independent 3D graphics clipping engine by dual-thread algorithm

A statistical framework for replay detection in soccer video

Advanced real time fire detection in video surveillance system

Suspicious object detection using fuzzy-color histogram

Video enhancement based on saturation adjustment and contrast enhancement

Algorithm for parallel inverse halftoning using partitioning of Look-Up Table (LUT)

A feature-based image registration technique for images of different scale

Recover image coding loss with LMS filtering

FMO slice group maps using spatial and temporal indicators for H.264 wireless video transmission

Fast mode selection to reduce the encoding complexity of H.264/AVC

A generalized fast motion estimation algorithm using external and internal stop search techniques for H.264 video coding standard

Redundant multiscale structure coding for error resilient video completion

2007 IEEE International Symposium on Circuits and Systems

2006 IEEE International Symposium on Circuits and Systems

2005 IEEE International Symposium on Circuits and Systems

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.

The IEEE International Symposium on Circuits and Systems, 2003. Tutorial Guide: ISCAS 2003.

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)

Tutorial Guide. ISCAS 2001. IEEE International Symposium on Circuits and Systems (Cat. No.01TH8573)

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)

ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187)

Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97

1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96

Proceedings of ISCAS'95 - International Symposium on Circuits and Systems

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94

1993 IEEE International Symposium on Circuits and Systems

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems

1991., IEEE International Sympoisum on Circuits and Systems

IEEE International Symposium on Circuits and Systems

IEEE International Symposium on Circuits and Systems,

1988., IEEE International Symposium on Circuits and Systems

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in