NDLI: 0.5 VDD digitally controlled oscillators design with compensation techniques for PVT variations

Content Provider	IEEE Xplore Digital Library
Author	Chia-Wen Chang Shyh-Jye Jou Yuan-Hua Chu
Copyright Year	2011
Description	Author affiliation: Department of Electronics Engineering, National Chiao Tung University, Taiwan (Chia-Wen Chang; Shyh-Jye Jou) \|\| Information and Communications Research Laboratories, Industrial Technology Research Institute, Taiwan (Yuan-Hua Chu)
Abstract	This paper presents a low voltage and low power digitally controlled oscillator (DCO) with not only wide frequency range and high frequency resolution but also compensation techniques against PVT variations. The frequency range of the 0.5 VDD DCO, implemented in GP-65 nm LVT CMOS process, is from 278 MHz to 25 MHz for portable applications and consumes only 148 µW at 278 MHz and 28.5 µW at 25 MHz. Even in a dirty VDD/GND condition, the peak-to-peak and RMS period jitter are 98.7 and 12.7 ps, respectively. In addition, with compensation techniques used in this work, the effective frequency range is increased by 1.786 times. As a result, compensation techniques in this work are very suitable for the demand of robust design, especially in low-voltage systems or wide PVT environments.
Starting Page	606
Ending Page	609
File Size	1782684
Page Count	4
File Format	PDF
ISBN	9781612841922
ISSN	2162755X
e-ISBN	9781612841939
e-ISBN	9781612841915
DOI	10.1109/ASICON.2011.6157278
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-10-25
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates Tuning Q measurement CMOS technology Microprocessors Solids CMOS integrated circuits low voltage All-digital phase-locked loop digitally controlled oscillators PVT variations compensation techniques
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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