NDLI: Ultra low voltage, wide tuning range voltage controlled ring oscillator

Content Provider	IEEE Xplore Digital Library
Author	Li Tianwang Jiang Jinguang Ye Bo Han Xingcheng
Copyright Year	2011
Description	Author affiliation: Department of integrated circuits and communication software International school of software, Wuhan University, 430072 China (Li Tianwang; Jiang Jinguang; Han Xingcheng) \|\| Faculty of Computer & Information Engineering, Shanghai University of Electric Power, 200090 China (Ye Bo)
Abstract	An ultra low voltage, wide tuning range voltage controlled ring oscillator is presented in this paper. The threshold voltage of PMOS and NMOS transistors is reduced by forward biasing the bulk junction of the transistors for ultra low power supply voltage operation. The linearity of four different PMOS loading architectures is compared and the PMOS load with best linearity is used in the proposed delay cell. The frequency of the VCO is tuned by changing the resistance of the loading transistors. A tree stage voltage controlled ring oscillator VCO is designed in 0.18 µm RF CMOS process. The frequency of the proposed VCO is changed from 82 MHz to 370 MHz when the control voltage is from 0.5 V to 0 V. The phase noise of the VCO is −82dBc/Hz at 1MHz offset frequency when it oscillates at 370MHz
Starting Page	824
Ending Page	827
File Size	754928
Page Count	4
File Format	PDF
ISBN	9781612841922
ISSN	2162755X
e-ISBN	9781612841939
e-ISBN	9781612841915
DOI	10.1109/ASICON.2011.6157332
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-10-25
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Voltage-controlled oscillators MOS devices Radio frequency Delay CMOS integrated circuits Switches Robustness
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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