NDLI: A 0.25dB gain step high linear programmable gain amplifier

Content Provider	IEEE Xplore Digital Library
Author	Xiaobin Shen Taotao Yan Yuxiao Lu Jianjun Zhou
Copyright Year	2011
Description	Author affiliation: Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiao Tong University, 200240, China (Xiaobin Shen; Taotao Yan; Yuxiao Lu; Jianjun Zhou)
Abstract	A 0.25dB gain step high linear and accurate digitally programmable gain amplifier (PGA) is presented in this paper. The PGA consists of a coarse stage PGA, a fine stage PGA and a buffer. The voltage gain of the coarse PGA can be changed from −6dB to 17dB with 1dB steps and has a −3dB bandwidth of 35MHz. In order to optimize the linearity and gain accuracy, a new structure resistor array is proposed to realize the 0.25dB step fine PGA. The fine PGA shows a dB-linear range of 11.75dB (−5.75dB to 6dB) with a gain error of less than 0.09dB. The proposed PGA circuit is designed in a 0.18um CMOS process and the simulation results show that the PGA has the output-referred third-order interception (OIP3) of 39.7dBm and THD of −79.84dB at −1dBVp-p output voltage, with a current consumption of 2.2mA from a 1.8V supply.
Starting Page	1062
Ending Page	1065
File Size	806353
Page Count	4
File Format	PDF
ISBN	9781612841922
ISSN	2162755X
e-ISBN	9781612841939
e-ISBN	9781612841915
DOI	10.1109/ASICON.2011.6157391
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-10-25
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Switches Electronics packaging MOSFET circuits
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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