NDLI: A 40-GHz phase-locked loop front-end for 60-GHz transceivers in 65nm CMOS

Content Provider	IEEE Xplore Digital Library
Author	Cheema, H.M. Mahmoudi, R. van Roermund, A.
Copyright Year	2010
Description	Author affiliation: Department of Electrical Engineering, Mixed-signal Microelectronics group, Eindhoven University of Technology, 5600 MB, The Netherlands (Cheema, H.M.; Mahmoudi, R.; van Roermund, A.)
Abstract	A phase-locked loop front-end including a LC voltage controlled oscillator and an I-Q injection locked frequency divider is presented. The operation ranges of the VCO and ILFD are aligned by co-designing the tank, specifically the tunable varactors. The total locking range of the front-end is 37.6 to 42.2 GHz which corresponds to a down-conversion range from 56.4 to 63.3 GHz at 60 GHz, thus covering the complete ISM band. The front-end phase noise for a VCO frequency of 39.8 GHz is −102 dBc/Hz at 1 MHz offset. The DC power consumption of the VCO and Q-ILFD is 6mW and 9mW from a 1.2 V supply, respectively. Implemented in a bulk CMOS 65nm technology, the circuit occupies an area of 0.7×0.5 $mm^{2}.$
Starting Page	967
Ending Page	970
File Size	597615
Page Count	4
File Format	PDF
ISBN	9781424474547
e-ISBN	9781424474561
DOI	10.1109/APCCAS.2010.5774963
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-12-06
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Voltage-controlled oscillators Phase locked loops Tuning Phase noise Capacitance CMOS integrated circuits Transceivers phase locked loop injection locked frequency divider voltage controlled oscillator
Content Type	Text
Resource Type	Article

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