NDLI: Planarization Process for Fabricating Multi-Layer Nb Integrated Circuits Incorporating Top Active Layer

Content Provider	IEEE Xplore Digital Library
Author	Satoh, T. Hinode, K. Nagasawa, S. Kitagawa, Y. Hidaka, M. Yoshikawa, N. Akaike, H. Fujimaki, A. Takagi, K. Takagi, N.
Copyright Year	2002
Abstract	We have developed an advanced process for fabricating a next-generation multi-layer Nb integrated circuit structure incorporating a top active layer. In this structure, the passive-transmission-line (PTL) layer is placed between the top active layer and a DC-bias current layer at the bottom. This structure will make it possible to flexibly design active circuits and PTL wiring, and will also enable active circuits to be effectively shielded from magnetic fields generated by a large DC-bias current. Both the DC-bias current layer and the PTL layer are planarized; however, the top active layer is fabricated without planarization. To fabricate this new structure, it was necessary to achieve a better planarization process for junctions formed over underlying Nb patterns. The combined process we developed comprising additional SiO₂ deposition and additional mechanical polishing after the standard Caldera planarization process results in superior planarization for junction formation. We obtained excellent characteristics of junctions formed over underlying pattern edges when they were fabricated on surfaces planarized using this new process. Using the process, we fabricated new 10-Nb-layer integrated circuit structures and estimated the characteristics of their circuit elements.
Sponsorship	Council on Superconductivity Appl. Superconductivity Conference Inc MIT
Starting Page	167
Ending Page	170
Page Count	4
File Size	589700
File Format	PDF
ISSN	10518223
Volume Number	19
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-06-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Planarization Niobium Active circuits Wiring Magnetic shielding Fabrication Superconducting devices Superconductivity Laboratories Circuit testing superconducting integrated circuits Integrated circuit fabrication Josephson device fabrication niobium
Content Type	Text
Resource Type	Article
Subject	Condensed Matter Physics Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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