NDLI: Wafer Probing Simulation for Copper Bond Pad Based BPOA Structure

Content Provider	IEEE Xplore Digital Library
Author	Yumin Liu Yong Liu Irving, S. Luk, T.
Copyright Year	2007
Description	Author affiliation: Fairchild Semicond. (Suzhou) Corp., Suzhou (Yumin Liu)
Abstract	The bond pad metallization in the bond pad over active (BPOA) structure as well as interconnection lines in the device are shifting from aluminum to copper in recent years, because copper has better mechanical property and improved electrical conductivity compared with Al. In order to prevent copper oxidization, two extra thin layers of Ni and Au are added above the copper pad. With this structure, reliable wire bonding can be formed. On the other hand, in order to further reduce the die size and fully utilize the space below bond pads, a layout technology, termed bond pad over active (BPOA), is developed. The BPOA structure may induce some reliability concern that the wire bonding stress and probing stress may cause failures in the underlying devices. In wafer probing test, both electrical and mechanical contacts are made between the probe tip and the bond pad. This may impact the structures below the bond pad, such as dielectric layers and active devices. It may induce very high stress in dielectric and passivation layers since the contact area of probe tip is very small. In this paper, the impact of passivation thickness, and bond pad metal layer thickness is investigated, as well as the probe tip shape and friction between the probe and bond pad by the finite element simulations. Simulation results show that the trends of different parameters impact on 2-D results match well with the 3-D results.
Starting Page	1
Ending Page	5
File Size	5305786
Page Count	5
File Format	PDF
ISBN	142441105X
DOI	10.1109/ESIME.2007.360035
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-04-16
Publisher Place	UK
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Copper Wafer bonding Probes Stress Wire Space technology Contacts Passivation Metallization Aluminum
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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