NDLI: High-throughput reconfigurable computing: design and implementation of an IDEA encryption cryptosystem on the SRC-6E reconfigurable computer

Content Provider	IEEE Xplore Digital Library
Author	Michalski, A. Buell, D. Gaj, K.
Copyright Year	2005
Description	Author affiliation: Dept. of Comput. Sci. & Eng., South Carolina Univ., Columbia, SC, USA (Michalski, A.; Buell, D.)
Abstract	The combination of traditional microprocessors workstations and hardware-reconfigurable field programmable gate arrays (FPGAs) has developed a new class of workstations known as reconfigurable computers, with several examples demonstrating significant speedups compared to standalone PC workstations alone. Several platforms implement PC-FPGA communication using common PC peripheral interface buses such as PCI-X. A new approach from SRC Computers implements a highspeed communication interface that increases the throughput compared to PCI interfaces. This paper demonstrates an efficient high-throughput implementation of IDEA encryption using the SRC platform. SRC design choices that influence both throughput and area are evaluated. Detailed analyses of FPGA resource utilizations, data transfer and reconfiguration overheads for the SRC system are provided, and a comparison between SRC and a public domain software implementation of IDEA are given.
Starting Page	681
Ending Page	686
File Size	705911
Page Count	6
File Format	PDF
ISBN	0780393627
DOI	10.1109/FPL.2005.1515812
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-08-24
Publisher Place	Finland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Cryptography Field programmable gate arrays Microprocessors Workstations Throughput Bandwidth Coprocessors Random access memory Computer interfaces Open source software
Content Type	Text
Resource Type	Article

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