NDLI: Flipped CMOS-diaphragm capacitive tactile sensor surface mountable on flexible and stretchable bus line

Content Provider	IEEE Xplore Digital Library
Author	Asano, S. Muroyama, M. Bartley, T. Kojima, T. Nakayama, T. Yamaguchi, U. Yamada, H. Nonomura, Y. Hata, Y. Funabashi, H. Tanaka, S.
Copyright Year	2015
Description	Author affiliation: Tohoku Univ., Sendai, Japan (Asano, S.; Muroyama, M.; Bartley, T.; Kojima, T.; Tanaka, S.) \|\| Toyota Central R&D Labs., Inc., Nagakute, Japan (Nonomura, Y.; Hata, Y.; Funabashi, H.) \|\| Toyota Motor Corp., Toyota, Japan (Nakayama, T.; Yamaguchi, U.; Yamada, H.)
Abstract	The following novel configuration has been developed for a MEMS-CMOS integrated tactile sensor on a flexible and stretchable bus for covering a social robot body: a sensing diaphragm is formed on a CMOS substrate by backside etching, and the CMOS substrate is flip-bonded to a low temperature co-fired ceramic (LTCC) substrate. By this configuration, no through-silicon vias (TSVs) are needed, simplifying the fabrication process. The flipped CMOS substrate and the LTCC substrate were bonded and electrically connected using Au-Au bonding, which also formed differential capacitive gaps. A flexible and stretchable wire was fabricated by metal etching and polyimide laser cutting. The tactile sensors, which were mounted on the surface of the flexible bus, sent coded digital signals according to applied force.
Starting Page	97
Ending Page	100
File Size	1131003
Page Count	4
File Format	PDF
ISBN	9781479989553
ISSN	21641641
DOI	10.1109/TRANSDUCERS.2015.7180870
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-21
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Gold Tactile sensors Substrates CMOS integrated circuits Electrodes Stretchable wire Tactile sensor MEMS-CMOS integration Wafer-level packaging Au-Au bonding Surface mounting
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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