NDLI: An Innovative Embedded Logic Analyzer Based SoC Verification Platform

Content Provider	IEEE Xplore Digital Library
Author	Chao Lu Zhaoqian Chen Lingli Wang Xiaofang Zhou
Copyright Year	2006
Description	Author affiliation: Dept. of Microelectron., Fudan Univ., Shanghai (Chao Lu; Zhaoqian Chen; Lingli Wang; Xiaofang Zhou)
Abstract	This paper describes an innovative hardware/software co-verification platform, based on an embedded logic analyzer (ELA) in FPGA emulator, for system-on-a-chip. With the general-purpose ELA, the platform is rich in reusability, which reduces the expense of SOC verification. By offering the interface, image of design under test (DUT) and virtual channel, the platform plays the role as glue, which integrates different verification methods together. External verification tools as well as software develop environment can be involved in the platform. Behavior model written in C language and assertion-based verification (ABV) are also supported in this verification platform. To improve the verification efficiency, the platform can capture different amount of sampling signals dynamically in different situations using application-specific verification program. This platform characterizes high efficiency, flexibility and portability with low cost
Starting Page	1876
Ending Page	1879
File Size	83399
Page Count	4
File Format	PDF
ISBN	1424401607
DOI	10.1109/ICSICT.2006.306494
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-10-23
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System-on-a-chip Field programmable gate arrays Logic testing Embedded software Software tools Sampling methods Random access memory Emulation Logic design Performance analysis
Content Type	Text
Resource Type	Article

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