NDLI: Simulation of flash memory including charge trapping and de-trapping by Monte Carlo method

Please wait, while we are loading the content...

2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology

2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology

2008 9th International Conference on Solid-State and Integrated-Circuit Technology

2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings

ICSICT-2006 - 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings - Title

Conference organizations

Welcome message

ICSICT-2006 Sponsorship

Table of contents

Silicon nanotechnologies and emerging non-silicon nanoelectronics

Overcoming research challenges for CMOS scaling: industry directions

Nanoarchitectonics and nanoelectronics

The 11th Five-Year Plan and new wave of semiconductor development in China

Silicon-on-nothing (SON) technology

CMOSFET scaling through the end of the roadmap

Nanoelectronics: towards end of scaling and beyond

Challenges for sub-10 nm CMOS devices

Critical technology issues for deca-nanometer MOSFETs

A review of the SOI four-gate transistor

Scaling to 10 nm-bulk, SOI or double-gate MOSFETs?

Planar and multiple-gate transistors with silicon-carbon source/drain

Novel MOSFET devices for RF circuits applications

Prospective characteristics of nanoscale MOSFETs

CMOS devices architectures for the end of the roadmap and beyond

Manufacturing considerations of lithography independent nano-MOS-transisters in the sub-25 nm-region

Temperature impact on the lorentzian noise induced by electron valance band tunneling in partiallydepleted SOI nMOSFETs

An investigation of the effects of Si thickness-induced variation of the electrical characteristics in FDSOI with block oxide

Impact of improved mobility and low flicker noise MOS transistors using accumulation mode fully depleted silicon-on-insulator devices

Characterization of the self-aligned pseudo-SOI device structures

Experimental evidence of short-channel electron mobility degradation caused by interface charges located at the gate-edge of triple-gate FinFETs

The PDSOI accumulation-mode dynamic threshold pMOS with reversed Schottky barrier

Investigation of nanowire orientation and embedded Si/sub 1-x/Ge/sub x/ source/drain influence on Twin Silicon Nano-Wire Field Effect Transistor (TSNWFET)

Characteristics of MBCFET (Multi-Bridge-Channel MOSFET) with Tall-Embedded-Gate (TEG)

Recessed source/drain for scaling SOI MOSFET to the limit

An assessment of the performance for double gate Schottky barrier MOSFETs with modulated back gate

Strained-si and advanced channel materials on insulator: challenges and opportunities

Strained-SOI (sSOI) technology for high-performance CMOSFETs in 45nm-or-below technology node

Development of strained Si-SiGe-on-insulator wafers for high speed ULSI

Strained silicon technology

Process induced stress for CMOS performance improvement

The impact of stress enhanced technology for sub-90nm SOI MOSFETs

Mobility enhancement technology

Impact of strain-engineering on the low-frequency noise performance of advanced MOSFETs

Strain engineering for CMOS devices

Ge MOS transistor technology and reliability

Preparation of high-quality gate dielectrics for Ge MOSFET's in wet ambients

Uniaxial strain relaxation on ultra-thin strained-Si directly on insulator (SSDOI) substrates

A comprehensive semi-empirical mobility model for strained-Si N-MOSFETs

Monitoring of biaxial strained-silicon layers by spectroscopic ellipsometry

High performance high-k/metal gate germanium MOSFETs with shallow junction fabricated by laser thermal process

Effective suppression of fermi level pinning in poly-Si/HfO/sub 2/ gate stack by using poly-SiGe gate

Effect of surface roughness on quasi-ballistic transport in nano-scale Ge and Si double-gate MOSFETs

Electrical properties and temperature behavior of strained-Si N-MOSFETs

A novel strained Si channel heterojunction PMOSFET based on MBE LT-Si technology

Silicon-on-glass technology for RF and microwave device fabrication

An omni-directional comparison between common-emitter and common-base SiGe HBTs

A brief overview of modern high-speed SiGe HBTs

Single-grain Si TFTs and circuits for flexible electronics and 3D-ICs

A study of threshold voltage for poly-silicon thin film transistors

Impact of base doping profile on stability characteristics of SiGe HBTs

Linearity and dynamic loadlines of CE and CB SiGe HBTs under the influence of DC bias

Influences of device size on small- and large-signal performance of SiGe power HBTs

Standard SiGe technologies operating at 4 K for front-end readout of SQUID arrays

Electrical properties and carrier transport mechanisms of nanometer-scale ultra-thin channel poly-Si transistors

Microstructures of Ge-dots/Si multilayered structures fabricated by Ni-induced lateral crystallization

Extraction of R/sub SD/ and /spl Delta/L in deep-submicrometer MOSFETs

Effect of technology scaling on temperature independent point (TIP) in MOS transistors

Device physics and design theory of Si, Ge and Si/sub 1-x/Ge/sub x/ vertical dual carrier field effect transistor integrated circuits on insulator with effective channel length of 5-18nm

A monolithically integrated optical receiver with spatially modulated light detector in CMOS technology

Study of body contact of partial depleted SOI NMOS devices

Effect of implanting silicon in buried oxide on the radiation hardness of the partially-depleted CMOS/SOI

A novel bonding partial SOI structure with polysilicon transition layer

Improvement of thermal stability of multi-finger power SiGe HBTs using emitter-ballasting-resistor-free designs

Ballasting resistor optimum for the self-heating effect compensation in RF power HBTs

Improving the high frequency performance of SiGe HBT with new lateral structure and process

Technological requirements for a self-aligned lateral SiGe HBT with the SiGe layer formed by Ge ion implantation in Si including theoretical performance

Development on the high-speed bipolar transistor with BF/sub 2/-implanted thin base

New concept for improving characteristics of high-voltage power devices by buried layers modulation effect

A new dual-material gate LDMOS for RF power amplifiers

Analysis of SOI RESURF structure with charge sharing concept

Realization of over 650V double RESURF LDMOS with HVI for high side gate drive IC

Novel SJ-LDMOS with partial N-buried layer for SPIC applications

Effects of gate to drain capacitance to the AC characteristics of trench power MOSFET

A novel approach to compare the charge buildup induced by co-60 and X-ray radiation in SOI buried oxides

Leakage current characteristics of footed dual V/sub t/ dominos in nanometer CMOS technologies

The influence of source and drain junction depth on the sub-50nm MOSFET devices

Optimization of excimer laser annealing on low temperature polysilicon for thin film transistor applications

A novel structure of non-planar RF spiral inductor based on silicon

Laser frequency trimming technology based on FBAR

Development on Si optoelectronic receiving and processing chip

Silicon optical emitter in CMOS technology

Modeling and characterization of a merged PiN Schottky diodes with semi-super junction structure

CMOS hall sensor using dynamic quadrature offset cancellation

"Choices for future interconnect materials and processing"

Low dielectric constant materials: challenges of plasma damage

Xe implantation in SiO/sub 2/: low-k applications

Achieving ultra low k dielectric constant for nanoelectronics interconnect systems

Scaling interconnects to nanodimensions: interfacial chemistry considerations

Transmission line interconnect on Si CMOS LSI

High resolution analysis of Cu thin oxide formed on Cu in 32-nm node Cu/low-k application

Impact of chip-package interaction on reliability of Cu/ultra low-k interconnects for 65nm technology and beyond

New three-dimensional integration technology to achieve a super chip

Ni silicide and germanide technology for contacts and metal gates in MOSFET applications

Carbon-based nanostructures as interconnects in electrical and biological systems

ALD growth of Ru on RIE-pretreated TaN substrate

Study of re-sputtering effect on metallization for Cu interconnect

Damascene process for air-gap Cu interconnects using sacrificial layer HSQ

Investigation of Ru/TaN on low dielectric constant material with k=2.7

Tungsten carbides as a diffusion barrier for Cu metallization

Copper pulse plating on Ru/TaSiN barrier

Characterization of HDP FSG process

Optimizing post cleaning of Tungsten contact CMP to improve the yield of logic products with copper interconnect

DC and pulsed DC stress evolution in copper interconnects

An efficient 3D reluctance extractor for on-chip interconnects

High-k/metal gate stack technology for advanced CMOS

Defect passivation and interface engineering for high-K gate dielectric device performance and reliability enhancement

X-ray photoelectron spectroscopy study on dielectric properties at gate insulator film/Si interfaces

A novel high-k gate dielectric HfLaO for next generation CMOS technology

Controllability of flatband voltage in high-k gate stack structures - remarkable advantages of La/sub 2/O/sub 3/ over HfO/sub 2/

HfSiON gate dielectric technology for CMOSFET application

Physics of interfaces between gate electrodes and high-k dielectrics

Role of oxygen states in high-K gate stack engineering

Oxidation process of HfO/sub 2//SiO/sub 2//Si structures observed by high-resolution RBS

High-per formance, highly reliable HfSiON gate dielectric for low Vth system LSI's

Analysis of 1/f noise for CMOS with high-k gate dielectrics

Advanced Ni-based FUlly SIlicidation (FUSI) technology for sub-45nm CMOS devices

La-based oxides for high-k gate dielectric application

Combinatorial materials exploration and composition tuning for the future gate stack structure

Materials and thermal stability of tantalum carbide layers for metal gate applications

Polycrystalline Si optimization for 45nm node Ni-FUSI gate

Work function tunability by incorporating lanthanum and aluminum into refractory metal nitrides and a feasible integration process

Higher-k LaYOx films with strong moisture-robustness

Dual-work-function modulation for Ni-FUSI metal gate CMOS technology

Gate-leakage model of Ge MOS capacitor with high-k gate dielectric

Advances in atomic level deposition technologies

Atomically controlled CVD technology for group IV semiconductors

Fabrication of novel silicon-on-insulator substrates using plasma-based technology

Process requirements for continued scaling semiconductor devices - the needs for controlling both number and position of impurity atoms

Defect engineering in semiconductors through adsorption and photoexcitation

Laser annealing technology and device integration challenges

Fundamentals and applications of selenium-passivated Si[100] surface

Ultimate top-down etching processes for future nanoscale devices

Thermal stability of NiSi controlled by post silicidation metal doping method

Schottky barrier height modulation by ultra-shallow low-dose dopant diffusion

A technology for building shallow junction MOSFETs on vertical pillar walls

Electrical properties study of Ni (Pt)-silicide/Si contacts

CMOS shallow trench isolation x-stress effect on channel width for 130nm technology

The impact of forming temperature on material and electrical characteristics of nickel silicide gate electrode

An investigation on the bonding surface energy versus time in low temperature wafer bonding

Study on the lapping slurry for ULSI silicon substrate preparation

The application of a direct STI CMP process in ULSI fabrication

The particle-size-controllable growth of silica sol abrasive for chemical mechanical polishing

Etching of poly-Si with atomic scale accuracy in inductively coupled Ar and He plasmas

Design and fabrication of a low crosstalk SiO/sub 2//Si array waveguide gratings

Manufacturing yield ramp-up methodology for advanced technology

Measurements and analysis of process variability in 90nm CMOS

A new PVD sputtering source for metal gate application

UV curing technology for advanced device fabrication: challenges and solutions

The elimination of poly stringer in double poly AMS technology development

Recent progress of heterogeneous integration for semiconductor materials and microsystems

Bioluminescent bioreporter integrated circuit sensors for very low-level chemical detection

HDR CMOS imagers and their applications

Capturing cellular communication with guided electrode network on a silicon integrated circuit chip

Implementation and electrical characterization of CMOS single-transistor charge-modulation pixel structure

Design and analysis of a bulk micromachined distributed digital microwave phase shifter on glass substrate

A dielectric-bridge-type MEMS series contact switch for 0-10GHz applications

A GaAs micromachined accelerometer with frequency output based on resonant tunneling diodes

CMOS image sensors using feedback reset circuits for high speed operation

The cell detection using EIS sensor and phage display

UHF RFID front-end with magnetic sensor

Design and research of RS232 communication circuit used for 0.6um CMOS sensor IC

Micro-strip spiral resonator in miniaturized inductively coupled plasma source

Design and modeling of reconfigurable MEMS low pass filter

Design of piezoelectric resonant filter with tunable bandwidth

Design and fabrication of a novel six supports capacitive micro RF switches with Parylene-C as structural material

Fabrication of poly crystalline 3C-SiC resonator

A novel SPDT MEMS switch with isolation between bias and signal

Electromagnetic interference induced during the switching of a capacitive RF MEMS switch

A novel double-end heating type MEMS microwave power sensor

Study on dynamic characterization of a shunt capacitive RF MEMS switch

Design and simulation of on-chip RF magnetic medium inductors

The simulation and design of SAW filter using slanted finger which slopes diversely at different sub-segment

Design and simulation of 1D longitudinal acoustic resonator for photoacoustic spectroscopy

Membrane structure FBAR fabricated with highly c-axis oriented AlN film based on platinum electrode

A novel cantilever acoustic sensor with frequency output based on resonant tunneling diodes

System-level dynamic simulation for a MEMS clamped-beam based on the mechanical description

An analytical model for the output voltage of four-terminal silicon pressure transducers

Magnetically levitated micro gyroscope and its software realized demodulation circuit

A novel monolithic CMOS capacitive pressure sensor

A novel MOSFET pressure microsensor

Nonlinear model of open-loop mode capacitive micro-accelerometer

A MEMS IR thermal source for NDIR gas sensors

An improved CMOS-compatible bulk-silicon-micromachined microemitter for dynamic infrared scene projector

A novel uncooled a-Si microbolometer for infrared detection

A low noise Si-CMOS amplifier-multiplexer readout circuit array for imaging applications

EWOD-based variable-focus liquid lens

The study of the gas microsensors based on polymer-carbon black composites

Experimental study on the o/sub 2/ influences on semiconductor gas sensor responses

Design of a novel 2-D silicon piezoresistive flow sensor

0.6/spl mu/m CMOS pH sensor IC with Si/sub 3/N/sub 4/ island structure

Design and optimization of micro-cantilever-based and magnetic bead-based immunosensor for application of the biological molecules testing

A novel dry-type glucose sensor based on a metal-oxide-semicoductor capacitor (MOSC) structure with HRP+GOD catalyzing layer

A CMOS magnetic sensor based on synchronous sampling function

A novel comb electrostatic microrelay with lateral-driven

Study of spacer structure for large screen field emission display

Three-dimensional simulation of the deep UV light intensity distribution in SU-8 photorsists

Studies on coplanar radiation sensor based on diamond film

SiN-masked GaN-on-patterned-silicon (GPS) technique for fabrication of suspended GaN microstructures

A low-noise charge sensitive amplifier for MEMS capacitive sensors

A novel programmable CMOS temperature switch

Lumped behavioral modeling for suspended MEMS

A nodal analysis model for out-of-plane beamshaped electrothermal microactuators

Memory technologies for 50 nm and beyond

Scalability options for future SRAM memories

Advanced tunnel dielectrics for flash memory technology

Technology scaling impact on NOR and NAND flash memories and their applications

Highly scalable flash memory embedded into high-performance CMOS for the 90nm node and beyond

Scaling considerations for sub-90 nm split-gate flash memory cells

Novel silicon-based flash cell structures for low power and high density memory applications

Recent progress in ferroelectirc memory technology

ITO-channel ferroelectric-gate thin film transistor with large on-current

Some solutions for writing current reduction and high density application of phase change memory

Silicon nanocrystal memory - technology and applications

Memory properties using nano-scale phase separation of HfO based dielectrics

Fabrication and properties of nano-Si quantum dot flash memory

Characterization of Electronic Charged States of Si-based Quantum Dots for Multi-valued MOS Memories

Future trends in charge trapping memories

Extremely Low Voltage and High Speed Deep Trapping MONOS Memory with Good Retention

Novel Device Structures for Charge Trap Flash Memories

Two-bit/cell Nitride Trapping Nonvolatile Memory and Reliability

High density Flash-like cross-point MRAM

Reliability Issues and Models of sub-90nm NAND Flash Memory Cells

Endurance Characteristics of SuperFlash® Memory

Complimentary Bit Disturb in MirrorBitTM Flash Technology

Si-On-ONO (SOONO) Devices Realized on Bulk Si Wafers for Fully-Depleted SOI Transistor and 4-Bit Flash Memory Applications

Simulation of flash memory including charge trapping and de-trapping by Monte Carlo method

A fast bitline capacitance evaluation method for designing ferroelectric random access memory

A Novel Multi-Channel Phase-Change Memory Cell for Multi-State Storage with High Controllability

Novel HfAIO charge trapping layer in SONOS type flash memory for multi-bit per cell operation

An High Density Data Flash Based on Trapped Charge Programming and Erasing

On the Connection of SRAM Cell Stability with Switching History in Partially Depleted SOI Technology

Instabilities in deep submicron SRAM

DRAM to NAND-Diversification in the Memory Market

Integration of Spin-RAM technology in FPGA circuits

Device Tunnel Parameters for CoFe/Al-O/CoFe 1T1MTJ MRAM

Novel 0.18um Single-Body Control Gate Cell Structure and Co-Salicide Technology for High-Density and High Performance Embedded NOR Flash Applications

Drain Disturb Related to Negative VB in NOR flash

Improved Program Mode for Memory Array Based on Ferroelectric-Gate Field-Effect Transistor

Thin Films of Layered-Structure (1-x)SrBi2Ta2O9-xBi3TiTaO9 Solid solution for Ferroelectric Random Access Memory Devices

A novel design of 0.25μm2.5 V 2T-2C sensing scheme for FeRAM

Study on Chemical Mechanical Polishing of GeSbTe for Chalcogenide Phase Change Memory

Discussion on the CHE Programming Characteristics with the Scaling Down of Charge Trapping Flash Memory

Performance and Reliability Feature of Nanocrystal Memory Devices

Simulation of Program Characteristics of Nanocrystal Flash Memory Devices

Reversible resistive switching of Gd-doped TiO2 thin films for nonvolatile memory applications

Circuits and Implementation of a Low-Power Embedded EEPROM Memory

Design Space Exploration of Memory Architecture for Reconfigurable Computing

Physics and Applications of Deep UV LEDs

Electron Transport in InN

Liquid Phase Oxidation on GaAs-based Transistor Applications

Diamond Technology: An Overview - Invited Paper

Study of Surface Passivation with Different a-SiNBxB:H Films Effect on AlGaN/GaN HEMTs

Effect of Source-Connected Field Plate on Electric Field Distribution and Breakdown Voltage in AlGaN/GaN HEMTs

Effect of Traps and Self Heating on the Microwave Performance of SiC MESFETs

Visible blind p+/p/n-/n+ UV 4H-SiC photodiodes based on 4H-SiC homoepilayers

Effects of Homo-buffer Layer on Properties of ZnO Films Grown on Si(1 1 1) by Pulsed Laser Deposition

178GHz InP/InGaAs HBT with /spl mu/-bridge

Electrical properties of metamorphic $In_{0.52}Al_{0.48}As/In_{0.65}Ga_{0.35}As$ HEMT's on GaAs substrate

High-Temperature Characteristics of A Symmetrically-Graded InAlAs/InxGa1-xAs/GaAs MHEMT

Subthreshold Characteristics and High-Frequency Performance in InAlAs/InGaAs MHEMT with a Liquid Phase Oxidized InAlAs Gate

A Ku/K-band PHEMT Diode Single-balanced Mixer

8-Watt internally matched GaAs power amplifier at 16-16.5GHz

NEW PHENOMENA IN NANOSTRUCTURES

Plasma Treatment on the Plastic Substrates for Liquid Phase Deposited SiO2 Films for Flexible Electronics Applications

Comparison of Nonlinear I-V Models for Submicron GaAs MESFET's Characteristics

Effect of Schottky Barrier Characteristics on the Power Density and Stability of GaN HFETs

Persistent photoconductivity in n-type undoped high-resistivity GaN

Epitaxial lateral overgrowth of gallium nitride without mask on sapphire

Effect of Passivation on Increasing of AlGaN/GaN HEMT Gate Reverse Leakage

Effects of V/III Ratios on the Properties of AlN Grown on Si (111) Substrate by LP-MOCVD

Growth and Structural Properties of InAlGaN Quaternary Alloys on Sapphire Substrates by RF-MBE

MOCVD grown AlGaN/AlN/GaN HEMT structure with compositionally step-graded AlGaN barrier layer

Current Discontinuity Character of MSM UV Detector Grown with AlGaN/GaN Multi-quantum Well

Investigation of Surface Charging Effects in AlGaN/GaN HEMT by a New Measurement Method

Structure Optimization of Field-Plate AlGaN/GaN HEMTs

Characteristics of InGaN Channel HEMTs Grown by MOCVD

Epitaxial growth of SiC films at low temperature and its photoluminescence

Homoepitaxial Growth and Device Characteristics of SiC on Off-Oriented Si-Face (0001) 4H-SiC

Polysilicon-Al Based Ohmic Contact on p-Type 3C-SiC Film Grown on Silicon Substrate

Two-Dimensional Analysis of the Surface Trap Effect on Gate Lag Phenomena in 4H-SiC MESFET

High breakdown voltage 4H-SiC Schottky Barrier Diodes with floating metal rings for MMIC applications

The Study of ZnO Photoconductive UV Detector

A New ZnO Film Photodetector Fabricated on Diamond Substrate

Fabricacion and electrical properties of Al-doped ZnO/p-Si heterojunction

Fabrication of Capacitive Frisch Grid CZT Detector

Investigation of annealing on Au/p-CdZnTe Contact

Investigation of Passivation Layer of CdZnTe Detector

Thermally Activated Carrier Dynamics and Photoluminescence in Self-assembled InAs Quantum Dots

The Preparation of Large diameter Twin-free InP Crystals

NDR Heterojunction Bipolar Transistor with Base of 8nm Width

Enhancement Mode pHEMT LNA with Super Low Noise and High Gain for S Band Application

GaAs layers under external uniaxial stress: photoluminescence studies

Very Broadband GaAs HBT RF MIC Power Amplifier

Design and Performance of a Preamplifier for HgCdTe IR Detectors

On the improvement of solar cell based photovoltaic charger system

Carrier-transport and Light-emission Processes in an Organic Light-emitting Device

Magnetic-Semiconductors in Fe-Ti-Oxide Series and Their Potential Applications

Multifunctional Characteristics of Perovskite Oxide p-n Heterojunctions

A New Approach to Interconversion of Thermal and Electrical Energy

Characterization of Large Area PLD Grown Combinatorial Compositions of Barium Strontium Titanium Oxides

Interfacial depletion layers evidenced from dielectric relaxation current in ferroelectric thin films

Fabrication of IR Reflectors by Porous Silicon Technique

Investigation of Ni reaction with amorphous SiGeC thin film

Investigation of GaAs Wafer Surface Blistering by Hydrogen Implantation

Investigation of irradiation donors in electron irradiated CZ-Si

Formation of fB-FeSi2 from Fe/Si Multilayers by Sputtering

Precursor transfer synthesis and magnetic properties of nickel nanorods

In-Plane and Perpendicular Hall Magnetoresistance Ratio in MgO/FeCo/Pt/GdFeCo

The preparation of uniform Ag-TCNQ electrically bistable films with nano-grains for ultrahigh density data storage

Electrical conduction and reliability of anisotropic conductive adhesives filled with Ag/Cu-coated epoxy composite particles

Optical Properties of Eu/sup 3+/:Y/sub 2/SiO/sub 5/ crystal

Single elecronics: potentials and issues

Towards Quantum Ballistic Field-Effect Transistors: Design and Experimental Results

Nanocrystalline Silicon Quantum Dot Devices

An Energy Barrier Framework for the Limits of Charge, Spin and Optical Switches

Onset of Entanglement and Noise Cross-Correlations in Two-Qubit System Interacting with Common Bosonic Bath

Resonant Tunneling Diodes on Si Substrates Using Fluoride Heterostructures and Feasibility of Application to Integrated Circuits

Single-electron device using Si nanodot array and multi-input gates

A nanotube-on-insulator (NOI) approach toward scalable and integratable nanotube devices on sapphire

Effects of Quantized Energy Levels of QDs Confined in Asymmetric Barriers within Silicon Nanowire Transistor

A Solid State Neuron for the Realisation of Highly Scaleable Third Generation Neural Networks

Copper Nanowires Embedded in Flexible Substrate

The Study on Nanocontact Printing with Ink Aminosilane

Coulomb Blockade Oscillations in Silicon Single-electron Transistor with a Strong Gate-dot Coupling

Rectification Characteristics in Saturated Molecular Junction

Spin-Current Shot Noise in Spin Transitors

Effect of Annealing on SAF Spin Valves with Variable Easy Axis of Free Layer

Investigation the Optical Properties of Colloidal Photonic Crystals in Optical Circuits

Dendritic Gold Nanostructures: Fabrication and Potential Application in Nanoelectronics

Optical Characteristics of Nano-crystalline Diamond Films as X-ray Lithography Masks for Integrated Circuit Fabrication

Reliability Issues in Multi-Gate FinFETs

On the Reliability Issues of RF CMOS Devices

Electrostatic Discharge Protection in the Nano-Technology - Will We be able to Provide ESD Protection in the Future?

A Note on Non-Uniform Distribution of the Carrier Lifetime in Large-Area Devices

Comparison of novel BTI measurements for high-k dielectric MOSFETs

Models of Source/Drain Bias on Negative Bias Temperature Instability

Electron Velocity Saturation and Probable Cross-Section Area of Leakage Current Path Post Soft Breakdown (SBD) in Ultrathin Gate Oxides

Bias Temperature Instability in MOSFETs with Atomic-Layer-Deposited Si-Nitride/SiO2 Stack Gate Dielectrics

Hot Carrier Induced Leakage Current Instability in Metal Induced Laterally Crystallized n-type Poly-Silicon Thin Film Transistors

Radiation Hardened Performance of CMOS Devices Fabricated by Using Modified Thin SOS Film

Impact of varying electric field: tunneling in deep submicron nMOSFET

Dynamic NBTI characteristics of p-MOSFET with N-plasma SiON Gate Dielectric

Ultrathin Oxynitride p-MOSFET Recovery Characteristics under NBTI Stress

A new on-line method to evaluate the NBTI degradation of the ultrathin oxide

An Investigation on the Permanent Component of NBTI Degradation in a 90nm CMOS Technology

Analysis of Substrate Current and HCI Phenomena in High Voltage NMOSFET

Ionizing Irradiation Effect of Fluorine Implanted Metal-BOX-Silicon Structure Based on SOI

Interaction of NBTI with Hot Carriers in PMOSFET's for Advanced CMOS Technologies

Investigation of Gate-Induced Drain Leakage Current in Ultra-thin Gate Oxide LDD nMOSFET's

On the Self-Limiting Hot-Carrier Degradation Mechanism in Ultra-deep Submicrometer Lightly-doped-drain NMOSFET's

An on-chip monitoring circuit for NBTI

Low Voltage Stress Induced Substrate Current as a Monitor for Interface States generation in ultra-thin oxide n-MOSFETs

The effects of incorporating nitrogen into silicon dioxide on gate leakage current in MOSFETs

A Time Dependent Dielectric Breakdown(TDDB) Prognostic Monitor

Application of Proportional Difference Operator Method on Endurance Characteristics study of Flash Memory

Leakage Power Modeling Method for SRAM Considering Temperature, Supply Voltage and Bias Voltage

Yield Modeling of Arbitrary Defect Outline

An on-chip monitoring structure for electromigration failure

TCAD for Next Generation Technology and Product Development

Towards Unification of MOS Compact Models with the Unified Regional Approach

Statistical Compact Modeling and Si Verification Methodology

Compact modeling of on-chip ESD protection using standard MOS and BJT models

Generation-Recombination-Trapping at Interface Traps In Compact MOS Transistor Modeling

Generation-recombination-trapping at interface traps in short-channel MOS transistors

Implementin spatial variation of impurity concentration in MOS transistor modeling

Microscopic Theory of Energy Distribution of SiO2/Si Interface Traps: A Survey of History and Some New Results

A New Two-dimensional Analytical Model for Threshold Voltage in Undoped Surrounding-gate MOSFETs

Drain Current and Transconductance Model for the Undoped Body Asymmetric Double-Gate MOSFET

Scalable Modeling of MOSFET Source and Drain Resistances for MS/RF Circuit Simulation

Impact of Process variations on Leakage Power in CMOS Circuits in Nano Era (Invited paper)

Nonisothermal Effects in SOI CMOS Analog Integrated Circuits Based on Electrothermal Simulation

Adjacent Device Thermal Effects Modeling and Characterization in Dielectrically Isolated Bipolar Technology

Circuit Enablement for SiGe BiCMOS and RFCMOS Technologies

Noise Modeling Based on Self-Consistent Surface-Potential Description for Advanced MOSFETs aiming at RF Applications

A study on relative sensitivity of sector split-drain magnetic field-effect transistor based on standard CMOS technology

A Compact Quantum-Mechanical Model for Double-Gate MOSFET

NQS effects on MOSFET's terminal currents

Closed-form Model of Barrier Height in Bulk MOSFET Including 2D Effects and Electron Statistics

Channel Engineering of Silicon Nanowire Field Effect Transistor: Non-Equilibrium Green's Function Study

Temperature Characteristics for Threshold Voltage of HV LDMOS

Modeling the MOSFETs' Gate Current with the Drawn Dimensions

Impact of Intrinsic Parameter Fluctuations on SRAM Cell Design

T-Shaped Body Silicon-on-Insulator (SOI) MOSFET

An Analytical Potential Model of Double-Gate MOSFETs with Schottky Source/Drain

Model-Adaptable MOSFET Parameter Extraction With A Hybrid Genetic Algorithm

Logic Analysis of High-speed MOBILE Circuit

TCAD Analysis for VLSI-Application-Oriented Process Optimization

The Impact of Device Structure and Quantum Mechanics on Effective E-Field in Ultra-thin Body and Double-gate SOI MOSFETs

Modeling of Geometry-Induced RF Characteristics of Double-Gate MOSFETs

Coulomb Scattering induced mobility degradation in Ultrathin-body SOI MOSFETs with high-k gate stack

Influence of Gate-Electrode Fringing Capacitance on Threshold Voltage of Nano-MOSFET

Polysilicon Gate Quantum Effect Model for nanoscale MOSFET's

Analytical Model for Surface Electrical Field of Double RESURF LDMOS with Field Plate

The analysis and modeling of on-resistance in high-voltage LDMOS

Correction in Threshold Voltage Model Accounting for Quantum Effects in Strong Inversion Channel

The Fast Simulation Model of SRAM

Efficient Parameter Extraction Scheme in Ultra-Thin Gate Dielectric MOS Capacitor with Considerable Gate Leakage

Accurate Modeling and Extraction Methodology for RF-MOSFET Valid Up to 40GHz

Modeling of Scattering at High-k Dielectric/SiO2 Interface of Strained SiGe MOSFETs

Study of the SEU Effect Mechanism on SOI PMOS by 2-D Simulation

Optimization of BSIM3 I-V Model for Double Diffused Drain HV MOSFET

Investigation of Double gate structure for RF application

Body current model for Drift Drain Mosfet

An ESD Protection Device Simulation-Design Methodology based on MEDICI

Analytical Quantum Modeling of Inversion Charge Density for Nanoscale Undoped Symmetric DG-MOSFETs

Engineering of S/D Lateral Diffusion for DG-FETs Based on Full Quantum Analysis

A Robust Novel Technique for SPICE Simulation of ESD Snapback Characteristic

An analytical Model and New Structure of SOI High Voltage Devices with Compound Dielectric layer

Channel resistance method for parameter extraction of ultra-thin gate oxide LDD MOSFET's

Analysis of Fringing-Electric-Field-Related Capacitance Behavior of Narrow-Channel FD SOI NMOS Devices Using 3D Simulation

Compact model of LDMOS for circuit simulation

A Wide-Band Equivalent Circuit Model for CMOS On-Chip Spiral Inductor

Electromagnetic simulation on high-frequency solenoid inductors formed by focused-ion-beam stress-introducing technique

A Broadband Monolithic Balun Based on 0.13/spl mu/m CMOS Process Using Planar-Spiral Transformers

A Novel Modeling Methodology for Silicon-based RF Components

Effective Channel Mobility of Poly-Silicon Thin Film Transistors

Analysis of Self-Heating in Poly-Si Thin-Film Transistors and Circuits by a Self-Consistent Electro-Thermal Simulation Approach

Analysis of Temperature in High Power Laser Array Heat Sinks

Modeling of Nano-resonator Testing System by Lumped Parameter Method

First-principles evaluations of dielectric properties from nano-scale points of view

Local Model Analysis of Gate Insulator Oxides

Automistic modeling of direct tunnelling in metal-oxide-semiconductor nanostructures

Active feedback control of reactive sputtering AlN thin film fro FBAR

Simulation on Advanced Shallow Junction Technology with Atomistic Method

Plasma Etching Process Simulation for MEMS and IC Fabrication based on a Cellular Automata Method

Implementation of On-Chip Dynamic Trace for Microprocessors

Early-stage power grid analysis using a supenode-like formulation of circuit equations

An Incremental Boundary Element Method for the Variation-Aware Library-Building Procedure of Capacitance Extraction

Hierarchical H-Adaptive Computation of VLSI Interconnect Capacitance with QMM Acceleration

A Fast Capacitance Extraction Engine

Numerical Analysis of Barrier Layer Effect on Copper Electromigration

Atomistic Simulation of plasma enhanced chemical vapor deposited SiCOH dielectrics

Compact Modeling of Mechanical STI y-Stress Effect

Litholab: a new environment for micro-lithography modeling

Investigation of SAWs Propagating on the Nano-porous Film

On the giant optical anisotropy observed in M-plane GaN/AlGaN quantum wells by crystal-field effect

A Method of Thermal Analysis for CMOS Integrated Circuit

3D-SoC Thermal Design Optimization and ANSYS Simulation

A dynamic small-signal model of the constant-frequency pulse width modulator of switching converters

Noise shaping sigma delta modulation techniques and models simulation

The investigation of SAWs propagation in layered anisotropic media for mechanical properties measurement of porous low-k dielectrics

OPC model calibration based on circle-sampling theorem

CMOS integrated transformers: coming of age

A high integration and low power consumption DAB baseband chip

Realization of an 8-bit High Performance Network Microcontroller

Design of Dual-mode Equalizer for QAM Demodulator in FPGA

A Highly linear Lowpass Filter for GSM /WCDMA Receivers

A 2.4-GHz Low-Power Single-Chip Tunable CMOS Low-IF ISM Receiver

A Novel Mini-LVDS Receiver in 0.35-um CMOS

Design of a Low-Power 8 x 8-Bit Parallel Multiplier Using MOS Current Mode Logic Circuit

Novel on-chip communication data channel architecture used in USB 2.0

A CMOS Low-Dropout Regulator With New Compensation Method

A CMOS TH-BPAM UWB Pulse Generator

Impact of CMOS Scaling on RF/Mixed-Signal Circuit Designs

Future Perspective of RF and Analog/Mixed-Signal Integrated Circuit Technologies for Mobile Communications

RF Design Challenges at 90nm RFCMOS Technology Under Low Voltage Applications

Highly Efficient and Linear Class E SiGe Power Amplifier Design

Fast Settling and Low Phase Noise Synthesizer and VCO Design

Design of CMOS LC Oscillators

Design of a 3-5GHz BiFET mixer for ultra wideband application

A 3.3V SiGe HBT Power Amplifier for 5GHz WLAN Application

An Enhanced 4.8-GHz Fully Integrated NMOS LC VCO for Wireless LAN Application

A 0.7-1.4 GHz Variable Band Low Noise Amplifier for Multi-band Applications

A Wideband Low Power VCO for IEEE 802.11a

A high linearity, low noise, and high gain transimpedance amplifier (tia)

A 10GHz With Low Power And Low Noise Figure Amplifier Using 0.18/spl mu/m CMOS Technology

A Low Power Gilbert Mixer for 10GH Application Using TSMC 0.18/spl mu/m CMOS RF Technology

A Novel Doubly-Balanced Folded Mixer for Low Supply Voltage and Direct Up-Conversion System

Compact and Broadband Coplanar Waveguide Left-Handed Metamaterial Transmission Line for RF/ MICC Application

Low phase noise 5 GHz VCOs in 0.13 /spl mu/m SOI and bulk CMOS

Design and modelling of a low phase noise pll frequency synthesizer

Gain-controlled CMOS Low Noise Amplifier

Design of A New Automatic Amplitude Control circuit for VCO

Design of an 11Gb/s CMOS Demultiplexer Using Redundant Multi-Valued Logic

10-GHz-Band VCOWith Low Phase-Noise Using 0.18/spl mu/m CMOS Process

A 3.3GHz-Bandwidth RF Broadband LNA with a gain of 29dB

A Resonance Enhanced 5.2-GHz-Band Monolithic CMOS LNA With 0.7-V Supply

A 0.18/spl mu/m CMOS LNA for UHF-RFID Reader Application

A New Method of Synchronization for RFID Digital Receivers

Novel Method for QDDFS with Super High Compression Ratio

A 3.1-10.6 GHz ultra-wideband low noise amplifier in 0.35-m SiGE BiCMOS

A Design of CMOS RF T/R Switch

A 80~900MHz CMOS VCO with Tunable AAC Circuit

Low Power and High Speed Addition Strategies for VLSI

Integrated Switched Mode Power Supplies Using Digital Controllers

Low Power RF Section of a Passive Tag in 0.35/spl mu/m CMOS

Leakage Power Reduction for CMOS Combinational Circuits

Circuit Design and Verification of On-Chip Femto-Ampere Current Mode Circuit Using 0.18/spl mu/m CMOS Technology

An Efficient Battery Aware Scheduling Algorithm for Tasks with Necessary Granularity

Battery Aware Variable Voltage Task Scheduling for System Energy Consumption Minimization

A proposed simple DC offset cancellation method for low-power integrated circuits

Low-power constant-coefficient FIR filtering in a hearing aid application

Latch-Based Clocking for Portable Low-Power Audio Applications

A low power sensor-signal read-out circuit powered by inductive line

Design of a Low Power Radiation Hardened 256K SRAM

High Performance Low-Power Sparse-Tree Binary Adders

Low-Power CMOS Fully-Folding ADC with a Novel Bit Synchronization Architecture

Delay Line Encoding For Low Power

A Low-Voltage and Low-Power CMOS LNA Using Forward-Body-Bias NMOS at 5GHz

A 1V 1.8GHz Low Power Differential Colpitts VCO

Low Power LVDS Driver Used in ADC Systems

A Switched-Capacitor Band-Pass Filter For Low-Voltage Applications

Fuzzy Logic for Low Power Driven Floorplanning

Power Profiling for Low Power Optimization Using New Computing Model

Nano-scale CMOS and Low Voltage Analog to Digital Converter Design Challenges

On-Chip ESD Protection Strategies for RF Circuits in CMOS Technology

Switching Amplifier and Its Future

An 1 V 6.25 GHz PLL with 0.5 ps rms Jitter in 0.13 /spl mu/m CMOS

Sub-1-V CMOS Bandgap using Forward Body Bias of the PMOS Differential Pair for Reduction of the Threshold Voltages

A Low-Power 8-bit Folding A/D Converter with Improved Accuracy

A 250MSPS 8-Bit Analog-to-Digital Converter Based on 0.35μm BiCMOS Technology

A Wide-Band Front-end for Terrestrial and Cable Receptions

0.5-V operational transconductance amplifier for CMOS bandgap reference application

A Capacitive Step-Down Converter Using a Linear Mode Pre-Regulator for Improved Load Regulation

Scheme for preventing ldo regulator for latch-up under short-circuit condition

A practical curvature-corrected technique for bipolar bandgap reference

Analysis of A Bandgap Circuit DC Shift Caused by Substrate Noise Generated by Power Switches

A Two-Channel 10Bit 80MHz CMOS Current-Steering D/A Converter

A 5.5-GHz Power Amplifier For Wide Bandwidth Polar Modulator

A GaAs HBT Power Amplifier with a Newly Active Bias Linearizer for W-CDMA Terminals

A novel current reference with low temperature coefficient in a large temperature range

A High Q Gm-C Filter for Multi-band Wireless Applications

A High Precision CMOS Current-mode Band-gap Voltage Reference

A Highly Stable CMOS Transimpedance Amplifier for Compact Integration

An Improved Compensated-Temperature and High PSRR Bandgap Reference Circuit Design

A new Analog Circuit Design Based on Reconfigurable Transistor Array

A High Precision Curvature Compensated Bandgap Reference without Resistors

Design of Low-Voltage Low-Dropout Regulator with Wide-Band High-PSR Characteristic

A Precise Curvature Compensated CMOS Bandgap Voltage Reference with Sub 1V Supply

A Cascaded Sigma-Delta Pipeline ADC Structure Design

Symmetry Constraint for Analog Layout with CBL Representation

A New Constraint-Driven Placement Approach for Analog Circuits

A High-linearity, 80-dB CMOS VGA with DC-offset Cancellation for DAB Application

Design of Switch Capacitor Integrator for DRSSADC

A Novel Temperature Stable CMOS Current Reference

An Improved Error Amplifier with Initial Voltage Reference

A Novel High Precision Voltage Regulator with High PSR

A Novel Error Amplifier Used in Power Management ICs

A programmable-gain chopper-stabilized 2-ordder sigma-delta modulator design

A Novel Feedforward Reversed Nested Miller Compensation Technique for Three-Stage Amplifiers

Implementation of a Quasi-digital ADC on PLD

CMOS Automatic Gain Control Circuit for Power Line Communication Application

GEM-SOC: A RISC/DSP dual-core platform for portable media applications

Scalability and simplicity enable ds-uwb radio for truly low power and high data rate applications

A PULSE-BASED NON-CARRIER 7.5GHz UWB TRANSCEIVER SoC WITH ON-CHIP ADC

RF/mixed-signal Ultrawideband Transmitter IC Design in Silicon Technologies

Low-Power Low-Noise Amplifiers for UWB Applications

An ultra low-power low-cost gaussian impulse generator for uwb applications

Challenges of Mobile WiMAX RF Transceivers

The importance and challenges of comprehending circuit and physical phenomena in RF system design and integration

Challenges for RF SOC in nanometer technology

RF CMOS SoC Architectures and Building Blocks

Technology Platform for IC Design in Nano-scale CMOS

Proximity Inter-Chip Communication

Statistical Modeling and Design

Process Induced Layout Variability for Sub 90nm Technologies

Implementation of TCAD-for-Manufacturing Methodology using Process Compact Models

A New Level Shifter with Low Power in Multi-Voltage System

A De-synchronous Circuit Design Flow using Hybrid Cell Library

Low Power Wide Dominos Design in sub-65nm CMOS Technologies

Digital Circuits Using SOI Four-Gate Transistor

Low Power High Speed Domino Logic based on Double Capacitive Body Biased Keeper

Buffer Insertion Based on Single-pair Shortest-path Algorithm for Interconnect-Centric Floorplanning

An Innovative Embedded Logic Analyzer Based SoC Verification Platform

Use of VPR in Design of FPGA Architecture

An Improved ASIC/SOC Design Methodology for Quick Design Convergence

Low Power Decimation Filter Design for GSM Sigma-Delta A/D Converter Application

A Scalable Design of RSA Crypto-coprocessor

A Low Cost design for Optimized IDCT and de-quantization of H.264

High Performance and Efficient Bandwidth Motion Compensation VLSI Design for H.264/AVC Decoder

A VLSI implementation of ECC combined with AES

A Variable Bandwidth High Speed FIR Filter Design for RFID Reader Receiver

A High Performance and Low Power Hardware Architecture of Entropy Coder for H.264/AVC Baseline

Efficient Optimization Methodology in Early-Stage Design of Mesh-structured On-Chip Power/Ground (P/G) Networks

A high throughput binary arithmetic coding engine for h.264/avc

Neural Network Based VLSI Power Estimation

Radiation Hardened 128K PDSOI CMOS Static RAM

A Stack-Mode Dual-Band Voltage-Controlled Oscillator for Multistandard Wireless Applications

A Novel Statistical Clock Skew Estimation Method

Exact minimization of large fixed polarity dual form of reed-muller functions

FPGA ROUTING ARCHITECTURE OPTIMIZATION

Simplified AES Algorithm Resistant to Zero-Value Power Analysis and its VLSI Implementation

A Novel On-chip Debug System with Quick All-registers Scan Chain Based on JTAG

Methodology of the design for segments-switchable switch blocks

A Novel Hybrid FPGA Architecture

FPGA Downloading Circuit Design and Implementation

Energy/Performance/Area Tradeoffs in Nanometer FPGA Segmented Routing Architecture

Design of a 128-point Fourier Transform Chip for UWB Applications

A new timed taylor expansion diagrams method

A Double-Edge-Triggered Phase Frequency Detector for Low Jitter PLL

Design of a Hierarchy-Bus Based MPSoC on FPGA

Study on a low cost, high quality hybrid scaling algorithm

The Research And Design Of Reconfigurable Cryptographic Chip Based On Block Cipher

Design and Implementation of a 64/32-bit Floating-point Division, Reciprocal, Square root, and Inverse Square root Unit

Crosstalk Prevention and Reduction in SuperV Back-end Design

Design and Implementation of Reconfigurable ECC Arithmetic Unit over GF(2m)

Design of a High-Speed LVDS I/O Interface Using Telescopic Amplifier

An all digital phase-locked loop based on double edge triggered flip-flop

An Adaptive Dynamic Arbiter for Multi-Processor SoC

New Self-repairing Digital Circuit Based on Embryonic Cellular Array

Baseline Wander Compensation Circuit for 100/1000Base-TX Application

Digital 90-degree phase shifter without pll or dll

Chip Design and Analysis based on a LRC Speech Algorithm

A Guiding Function Based Greedy Partitioning Algorithm for Dynamically Reconfigurable Systems

Fast Digital Coarse Tuning Loop for Wide-band Dual-loop Frequency Synthesizers

A High-Speed Area-Efficient Architecture for the Arithmetic in GF(2m)

Efficient VLSI Design and Implementation of Integer Motion Estimation for H.264 SDTV Encoder

Computational Complexity Scalable ME Algorithm and Architecture

A CORDIC Demodulator Platform for Digital-IF Receiver

A Novel Parallel Processing Architecture for Deblocking Filter in H.264 Using Vertical MB Filtering Order

Design of the Fast Acquisition PLL with Wide Tuning Range

Data Path Design of an Embedded MCU Core

Performance space exploration of analog integrated circuits based on statistical analysis

A new method of task call based on multiprocessor SoC

Design and Verification for VAC SOC in Mixed DFT Frame

Based on deep submicron under timing sensitive region clock tree reconstruction strategy

Self-correcting FSM Architecture Implementation Based on Convolutional Code

A Novel Low Leakage Power FPGAs Look-Up Table

Bandwidth Extension in CMOS with Transmission Line

A Partial Parallel folding Multiplier Design for 1024 bit Modular Multiplication

Cost-effective Hardware/Software Co-verification Environment and Co-Design Method based on C Prototype

Predictive Dynamic Power Management Policy with Consideration of Outlying Data

A High Performance BICMOS Current Sensing Circuit

A Novel Control Technique for Digital Power Factor Correction

An improved sawtooth oscillator and its application in on-chip femto-ampere current monitoring

A Novel OTA For Implementing Programmable CNN

Cubic Packing with Various Candidates for 3D IC Design

Bounded Model Checking for RTL Circuits Based on Algorithm Abstraction Refinement

A Self-Adapting Multi-Kernel Controllers Generating and Placing Method for Short System Cycle

A Novel Frequency Constrained Floorplanning Algorithm

Design Of A Low-Swing On-Chip Interconnect Circuit

Hierarchical Block Boundary Element Method for Substrate Resistance Calculation

Simulation and Evaluation for SS Network on Chip architecture using OPNET

A simple thermal-balance model for floorplanning based b/sup *-trees

Load Share Control Technique and Controller IC Design

Design and implementation of a high-speed and area-efficient viterbi decoder

The Design and FPGA Verification of a General Structure, Area-optimized Interpolation Filter Used in /spl Delta/-/spl Sigma/ DAC

Revisiting scalable modular multiplication over GF(2/sup m/) for elliptic curve cryptography

Design of Adiabatic SRAM Based on CTGAL Circuit

Electromigration in Flip-chip solder joints

Compact Frequency Offset Circuit for Testing IC RF Transceivers

A Wafer-level Protective Technique Using Glass Caps for MEMS Gyroscopes

The Failure Mechanism of Gate Resistance Testing for Power MOSFET

The Thermomechanical Coupling Effect in Multi-layered Microelectronic Packaging Structures

Test Set Optimization Based on Intelligent Hybrid Algorithm

A novel and simple pulsed dc bias test system for power amplifier

A New LFSR Reseeding Method for BIST

The testing of multiple RAM Cores in Soc system

Key Algorithms for Accurate GSM EDGE EVM Measurement on ATE Platform

A New Solution to Implement Multi-Full-Scan-Chain Test with JTAG

A Testing Approach for Xilinx FPGA's CLB

An Improved Heuristic Algorithm for MCM Substrate Test

Atomic scale characterization for nanoelectronic devices

Observing the Degradation and Breakdown Characteristics of Thin Gate Dielectrics Observed by Conductive Atomic Force Microscopy

Evaluation of phosphorous pile-up at the Si/SiO/sub 2/ interface

Plasma Etch Process Diagnosis and Control By Wireless Sensor Wafer in Semiconductor Chip Manufacturing

Determination of Metallic Impurities in Various Semiconductor Chemicals by Using ORS Quadruploe ICP-MS

Characterization of Sputtered Ta and TaN Films by Spectroscopic Ellipsometry

Possibility to read out 20-nm-sized pits using a near-field optical probe in an atomic force cantilevered snom

CMOS Gate Oxide Integrity Failure Structure Analysis Using Transmission Electron Microscopy

Photoluminescence Evaluation of Defects Generated during Temperature Ramp-up Process of SiGe-On-Insulator Virtual Substrate Fabrication

Thermal conductivity measurements of ultra-thin single crystal silicon films using improved structure

Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004.

2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)

1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)

Proceedings of 4th International Conference on Solid-State and IC Technology

Simulation of flash memory including charge trapping and de-trapping by Monte Carlo method

Content Provider	IEEE Xplore Digital Library
Author	Yuncheng Song Zhiliang Xia Jinfeng Yang Gang Du Jinfeng Kang Ruqi Han Xiaoyan Liu
Copyright Year	2006
Description	Author affiliation: Inst. of Microelectron., Peking Univ., Beijing (Yuncheng Song)
Abstract	We propose a self-consistent method to simulate charge trapping and de-trapping in charge storage layer and its interfaces of SONOS type flash memory devices. This method can be used under various applied voltages; in various structures composed of multiple material, thickness and shape of gate stack layers. It can also work with arbitrary trap density distribution in either real space or energy space. Further more, the self-consistent method has enough flexibility to accommodate detailed physical models
Starting Page	772
Ending Page	774
File Size	518439
Page Count	3
File Format	PDF
ISBN	1424401607
DOI	10.1109/ICSICT.2006.306482
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-10-23
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Flash memory SONOS devices Electron traps Nonvolatile memory Monte Carlo methods Probability Electron emission Tunneling Microelectronics Voltage
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in