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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yi-Chuen Eng Jyi-Tsong Lin Kuo-Dong Huang Tai-Yi Lee Kao-Cheng Lin |
| Copyright Year | 2006 |
| Description | Author affiliation: Dept. of Electr. Eng., National Sun Yat-Sen Univ., Kaohsiung (Yi-Chuen Eng; Jyi-Tsong Lin; Kuo-Dong Huang; Tai-Yi Lee; Kao-Cheng Lin) |
| Abstract | This paper is submitted with an investigation concerning the effects of the Si thickness-induced variation of the electrical characteristics in the FDSOI with block oxide. We noticed that the traditional sidewall spacer process is used and processed to produce the block oxide enclosing the Si-body in our proposed structure, the undesirable ultra-short-channel effects can be significantly diminished via the suppressed charge sharing out of the source/drain to the body, as compared to the conventional UTBSOI MOSFET. Also, owing to the required thickness of the Si-body, the self-heating problem gets improved, so the reliability of these structures be upgraded and benefit a renewed interest in the single-gate FDSOI MOSFET for the future ULSI applications |
| Starting Page | 61 |
| Ending Page | 64 |
| File Size | 1265053 |
| Page Count | 4 |
| File Format | |
| ISBN | 1424401607 |
| DOI | 10.1109/ICSICT.2006.306077 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2006-10-23 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Electric variables MOSFET circuits Fabrication Ultra large scale integration Silicon on insulator technology Thermal conductivity Electrons Etching Amorphous materials Implants |
| Content Type | Text |
| Resource Type | Article |
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