NDLI: A bulk micromachined silicon neural probe with nanoporous platinum electrode for low impedance recording

Content Provider	IEEE Xplore Digital Library
Author	Yi Jae Lee Su Jin Lee Hyo Sang Yoon Jae Yeong Park
Copyright Year	2013
Description	Author affiliation: Dept. of Electron. Eng., Kwangwoon Univ., Seoul, South Korea (Yi Jae Lee; Su Jin Lee; Hyo Sang Yoon; Jae Yeong Park)
Abstract	In this research, a bulk micromachined silicon neural probe with electroplated nanoporous Pt (NPt) electrodes was newly designed, fabricated, and characterized to reduce the interfacial impedance of microelectrodes which are highly desirable for neural signal recording and stimulation. One of the most important requirements in the electro-chemical neural probes is to reduce the interfacial impedance of microelectrodes, because the neural signals usually have very small amplitude and the increased impedance can cause the charge transfer capability of microelectrodes to decrease. The highly roughened NPt film was electroplated on top of circular shaped gold electrode (Diameter: 2 μm) formed on the tip of silicon neural probe. The roughen NPt surface could dramatically reduce the interface impedance of microelectrodes of neural probe. The fabricated neural probe exhibited extremely low impedance of 0.029 $Ωcm^{2}$ and specific capacitance of 4.6 $mFcm^{-2}$ at 1.2 kHz, respectively.
Starting Page	1
Ending Page	4
File Size	1128540
Page Count	4
File Format	PDF
ISBN	9781467346429
ISSN	19300395
DOI	10.1109/ICSENS.2013.6688581
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-11-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Probes Impedance Silicon Surface impedance Gold Microelectrodes
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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